component
74LVC1T45W6-7
Public Made by Adomby adom
Diodes Incorporated Translators, Level Shifters, SOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74LVC1T45W6-7
Diodes Incorporated · Translators, Level Shifters · SOT-26
74LVC1T45W6-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply for I/O pin A and reference for DIR, with a recommended operating range of 1.65 V to 5.5 V. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | A | bidirectional | Data input/output that tracks VCC(A); it is an input when DIR is high and an output when DIR is low, and inputs accept up to 5.5 V. |
| 4 | B | bidirectional | Data input/output that tracks VCC(B); it is an output when DIR is high and an input when DIR is low, and inputs accept up to 5.5 V. |
| 5 | DIR | input | Direction control referenced to VCC(A): high sends A data to the B output, low sends B data to the A output. |
| 6 | VCC(B) | power_in | Supply for I/O pin B, with a recommended operating range of 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-26 |
| Category | Logic |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High Level Output Voltage | VOH | 1.2 | V | IOH = -4mA; VCC(A) 1.65V; VCC(B) 1.65V | 5 | ||
| High Level Output Voltage | VOH | 1.9 | V | IOH = -8mA; VCC(A) 2.3V; VCC(B) 2.3V | 5 | ||
| High Level Output Voltage | VOH | 2.4 | V | IOH = -24mA; VCC(A) 3V; VCC(B) 3V | 5 | ||
| High Level Output Voltage | VOH | 3.8 | V | IOH = -32mA; VCC(A) 4.5V; VCC(B) 4.5V | 5 | ||
| Low-Level Output Voltage | VOL | 0.1 | V | IOL = 100μA; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 | ||
| Low-Level Output Voltage | VOL | 0.45 | V | IOL = 4mA; VCC(A) 1.65V; VCC(B) 1.65V | 5 | ||
| Low-Level Output Voltage | VOL | 0.3 | V | IOL = 8mA; VCC(A) 2.3V; VCC(B) 2.3V | 5 | ||
| Low-Level Output Voltage | VOL | 0.55 | V | IOL = 24mA; VCC(A) 3V; VCC(B) 3V | 5 | ||
| Input Current DIR | II | -2 | 2 | μA | VI = VCC(A) or GND; VCC(A) 0 to 5.5V; VCC(B) 0 to 5.5V | 5 | |
| Power Down Leakage Current A Pin | IOFF | -2 | 2 | μA | VI or VO = 0 to 5.5V; VCC(A) 0; VCC(B) 1.65V to 5.5V | 5 | |
| Power Down Leakage Current B Pin | IOFF | -2 | 2 | μA | VI or VO = 0 to 5.5V; VCC(A) 1.65V to 5.5V; VCC(B) 0V | 5 | |
| 3-State Leakage Current B Pin | IOZ | -2 | 2 | μA | VO = VCC(B); DIR = 0 V; VI = 0 to 5.5V; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 | |
| 3-State Leakage Current A Pin | IOZ | -2 | 2 | μA | VO = VCC(A); DIR = VCC(A); VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 | |
| Supply Current A | ICCA | 3 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 | ||
| Supply Current A | ICCA | 2 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 5.5V; VCC(B) 0 | 5 | ||
| Supply Current A | ICCA | -2 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 0; VCC(B) 5.5V | 5 | ||
| Supply Current B | ICCB | 3 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 | ||
| Supply Current B | ICCB | 2 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 5.5V; VCC(B) 0 | 5 | ||
| Supply Current B | ICCB | -2 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 0; VCC(B) 5.5V | 5 | ||
| Supply Current A + Supply Current B | ICCA + ICCB | 4 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 | ||
| Additional Supply Current A pin | ΔICCA | 50 | μA | A = VCC(A) -0.6V; DIR = VCC(A); B = open; VCC(A) 3V to 5.5V; VCC(B) 3V to 5.5V | 5 | ||
| Additional Supply Current DIR | ΔICCA | 50 | μA | DIR = VCC(A) -0.6V; A = VCC(A) or GND; B = open | 5 | ||
| Additional Supply Current B pin | ΔICCB | 50 | μA | B = VCC(B) -0.6V; DIR = GND; A = open; VCC(A) 3V to 5.5V; VCC(B) 3V to 5.5V | 5 | ||
| Operating Voltage VCC(A) | VCC(A) | 1.65 | 5.5 | V | 3 | ||
| Operating Voltage VCC(B) | VCC(B) | 1.65 | 5.5 | V | 3 | ||
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 0.65 | X VCC(A) | VCC = 1.65V to 1.95V | 3 | ||
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 1.7 | V | VCC = 2.3V to 2.7V | 3 | ||
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 2 | V | VCC = 3V to 3.6V | 3 | ||
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 0.7 | X VCC(A) | VCC = 4.5V to 5.5V | 3 | ||
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | 0.35 | X VCC(A) | VCC = 1.65V to 1.95V | 3 | ||
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | 0.7 | V | VCC = 2.3V to 2.7V | 3 | ||
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | 0.8 | V | VCC = 3V to 3.6V | 3 | ||
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | 0.3 | X VCC(A) | VCC = 4.5V to 5.5V | 3 | ||
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 0.65 | X VCC(B) | VCC = 1.65V to 1.95V | 3 | ||
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 1.7 | V | VCC = 2.3V to 2.7V | 3 | ||
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 2 | V | VCC = 3V to 3.6V | 3 | ||
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 0.7 | X VCC(B) | VCC = 4.5V to 5.5V | 3 | ||
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | 0.35 | X VCC(B) | VCC = 1.65V to 1.95V | 3 | ||
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | 0.7 | V | VCC = 2.3V to 2.7V | 3 | ||
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | 0.8 | V | VCC = 3V to 3.6V | 3 | ||
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | 0.3 | X VCC(B) | VCC = 4.5V to 5.5V | 3 | ||
| Input Voltage | VI | 0 | 5.5 | V | 3 | ||
| Output Voltage | VO | 0 | V | 3 | |||
| Operating Free-Air Temperature | TA | -40 | 125 | °C | 3 | ||
| Supply Voltage Range VCC(A), VCC(B) | VCC(A), VCC(B) | -0.5 | 6.5 | V | 2 | ||
| Input Voltage Range | VI | -0.5 | 6.5 | V | 2 | ||
| Voltage Applied to Output in High Impedance or IOFF State | VO | -0.5 | 6.5 | V | 2 | ||
| Voltage Applied to Output in High or Low State A pin | VO | -0.3 | V | Output in high or low state; A pin | 2 | ||
| Voltage Applied to Output in High or Low State B pin | VO | -0.3 | V | Output in high or low state; B pin | 2 | ||
| Input Clamp Current | IIK | -50 | mA | VI<0 | 2 | ||
| Output Clamp Current | IOK | -50 | mA | 2 | |||
| Continuous Output Current | IO | -50 | 50 | mA | 2 | ||
| Continuous Current Through VCC or GND | ICC | -100 | 100 | mA | 2 | ||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 2 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Thermal Resistance Junction-to-Ambient (SOT26) | θJA | 166 | °C/W | Note 6: FR-4 PCB, 2oz copper, minimum recommended pad layout | 6 | ||
| Thermal Resistance Junction-to-Case (SOT26) | θJC | 46 | °C/W | Note 6: FR-4 PCB, 2oz copper, minimum recommended pad layout | 6 |
CAD (KiCad official)
- Symbol:
74LVC1T45W6-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files:
74lvc1t45w6-7-etched.step/74lvc1t45w6-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc1t45w6-7.step/74lvc1t45w6-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (14 pp, sha256
fa7fdcc03fde4cb6, retrieved 2026-10-21, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVC1T45W6-7
**Diodes Incorporated** · Translators, Level Shifters · SOT-26
74LVC1T45W6-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC(A) | power_in | Supply for I/O pin A and reference for DIR, with a recommended operating range of 1.65 V to 5.5 V. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | A | bidirectional | Data input/output that tracks VCC(A); it is an input when DIR is high and an output when DIR is low, and inputs accept up to 5.5 V. |
| 4 | B | bidirectional | Data input/output that tracks VCC(B); it is an output when DIR is high and an input when DIR is low, and inputs accept up to 5.5 V. |
| 5 | DIR | input | Direction control referenced to VCC(A): high sends A data to the B output, low sends B data to the A output. |
| 6 | VCC(B) | power_in | Supply for I/O pin B, with a recommended operating range of 1.65 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-26 |
| Category | Logic |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High Level Output Voltage | VOH | 1.2 | | | V | IOH = -4mA; VCC(A) 1.65V; VCC(B) 1.65V | 5 |
| High Level Output Voltage | VOH | 1.9 | | | V | IOH = -8mA; VCC(A) 2.3V; VCC(B) 2.3V | 5 |
| High Level Output Voltage | VOH | 2.4 | | | V | IOH = -24mA; VCC(A) 3V; VCC(B) 3V | 5 |
| High Level Output Voltage | VOH | 3.8 | | | V | IOH = -32mA; VCC(A) 4.5V; VCC(B) 4.5V | 5 |
| Low-Level Output Voltage | VOL | | | 0.1 | V | IOL = 100μA; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 |
| Low-Level Output Voltage | VOL | | | 0.45 | V | IOL = 4mA; VCC(A) 1.65V; VCC(B) 1.65V | 5 |
| Low-Level Output Voltage | VOL | | | 0.3 | V | IOL = 8mA; VCC(A) 2.3V; VCC(B) 2.3V | 5 |
| Low-Level Output Voltage | VOL | | | 0.55 | V | IOL = 24mA; VCC(A) 3V; VCC(B) 3V | 5 |
| Input Current DIR | II | -2 | | 2 | μA | VI = VCC(A) or GND; VCC(A) 0 to 5.5V; VCC(B) 0 to 5.5V | 5 |
| Power Down Leakage Current A Pin | IOFF | -2 | | 2 | μA | VI or VO = 0 to 5.5V; VCC(A) 0; VCC(B) 1.65V to 5.5V | 5 |
| Power Down Leakage Current B Pin | IOFF | -2 | | 2 | μA | VI or VO = 0 to 5.5V; VCC(A) 1.65V to 5.5V; VCC(B) 0V | 5 |
| 3-State Leakage Current B Pin | IOZ | -2 | | 2 | μA | VO = VCC(B); DIR = 0 V; VI = 0 to 5.5V; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 |
| 3-State Leakage Current A Pin | IOZ | -2 | | 2 | μA | VO = VCC(A); DIR = VCC(A); VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 |
| Supply Current A | ICCA | | | 3 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 |
| Supply Current A | ICCA | | | 2 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 5.5V; VCC(B) 0 | 5 |
| Supply Current A | ICCA | -2 | | | μA | VI = 5.5V or GND; IO = 0; VCC(A) 0; VCC(B) 5.5V | 5 |
| Supply Current B | ICCB | | | 3 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 |
| Supply Current B | ICCB | | | 2 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 5.5V; VCC(B) 0 | 5 |
| Supply Current B | ICCB | -2 | | | μA | VI = 5.5V or GND; IO = 0; VCC(A) 0; VCC(B) 5.5V | 5 |
| Supply Current A + Supply Current B | ICCA + ICCB | | | 4 | μA | VI = 5.5V or GND; IO = 0; VCC(A) 1.65V to 5.5V; VCC(B) 1.65V to 5.5V | 5 |
| Additional Supply Current A pin | ΔICCA | | | 50 | μA | A = VCC(A) -0.6V; DIR = VCC(A); B = open; VCC(A) 3V to 5.5V; VCC(B) 3V to 5.5V | 5 |
| Additional Supply Current DIR | ΔICCA | | | 50 | μA | DIR = VCC(A) -0.6V; A = VCC(A) or GND; B = open | 5 |
| Additional Supply Current B pin | ΔICCB | | | 50 | μA | B = VCC(B) -0.6V; DIR = GND; A = open; VCC(A) 3V to 5.5V; VCC(B) 3V to 5.5V | 5 |
| Operating Voltage VCC(A) | VCC(A) | 1.65 | | 5.5 | V | | 3 |
| Operating Voltage VCC(B) | VCC(B) | 1.65 | | 5.5 | V | | 3 |
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 0.65 | | | X VCC(A) | VCC = 1.65V to 1.95V | 3 |
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 1.7 | | | V | VCC = 2.3V to 2.7V | 3 |
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 2 | | | V | VCC = 3V to 3.6V | 3 |
| High-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIH | 0.7 | | | X VCC(A) | VCC = 4.5V to 5.5V | 3 |
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | | | 0.35 | X VCC(A) | VCC = 1.65V to 1.95V | 3 |
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | | | 0.7 | V | VCC = 2.3V to 2.7V | 3 |
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | | | 0.8 | V | VCC = 3V to 3.6V | 3 |
| Low-Level Input Voltage Pin A or DIR Referenced to VCC(A) | VIL | | | 0.3 | X VCC(A) | VCC = 4.5V to 5.5V | 3 |
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 0.65 | | | X VCC(B) | VCC = 1.65V to 1.95V | 3 |
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 1.7 | | | V | VCC = 2.3V to 2.7V | 3 |
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 2 | | | V | VCC = 3V to 3.6V | 3 |
| High-Level Input Voltage Pin B Referenced to VCC(B) | VIH | 0.7 | | | X VCC(B) | VCC = 4.5V to 5.5V | 3 |
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | | | 0.35 | X VCC(B) | VCC = 1.65V to 1.95V | 3 |
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | | | 0.7 | V | VCC = 2.3V to 2.7V | 3 |
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | | | 0.8 | V | VCC = 3V to 3.6V | 3 |
| Low-Level Input Voltage Pin B Referenced to VCC(B) | VIL | | | 0.3 | X VCC(B) | VCC = 4.5V to 5.5V | 3 |
| Input Voltage | VI | 0 | | 5.5 | V | | 3 |
| Output Voltage | VO | 0 | | | V | | 3 |
| Operating Free-Air Temperature | TA | -40 | | 125 | °C | | 3 |
| Supply Voltage Range VCC(A), VCC(B) | VCC(A), VCC(B) | -0.5 | | 6.5 | V | | 2 |
| Input Voltage Range | VI | -0.5 | | 6.5 | V | | 2 |
| Voltage Applied to Output in High Impedance or IOFF State | VO | -0.5 | | 6.5 | V | | 2 |
| Voltage Applied to Output in High or Low State A pin | VO | -0.3 | | | V | Output in high or low state; A pin | 2 |
| Voltage Applied to Output in High or Low State B pin | VO | -0.3 | | | V | Output in high or low state; B pin | 2 |
| Input Clamp Current | IIK | | | -50 | mA | VI<0 | 2 |
| Output Clamp Current | IOK | | | -50 | mA | | 2 |
| Continuous Output Current | IO | -50 | | 50 | mA | | 2 |
| Continuous Current Through VCC or GND | ICC | -100 | | 100 | mA | | 2 |
| Operating Junction Temperature | TJ | -40 | | 150 | °C | | 2 |
| Storage Temperature | TSTG | -65 | | 150 | °C | | 2 |
| Thermal Resistance Junction-to-Ambient (SOT26) | θJA | | 166 | | °C/W | Note 6: FR-4 PCB, 2oz copper, minimum recommended pad layout | 6 |
| Thermal Resistance Junction-to-Case (SOT26) | θJC | | 46 | | °C/W | Note 6: FR-4 PCB, 2oz copper, minimum recommended pad layout | 6 |
## CAD (KiCad official)
- Symbol: `74LVC1T45W6-7`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files: `74lvc1t45w6-7-etched.step` / `74lvc1t45w6-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc1t45w6-7.step` / `74lvc1t45w6-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/74LVC1T45W6-7.pdf) (14 pp, sha256 `fa7fdcc03fde4cb6`, retrieved 2026-10-21, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvc1t45w6-7-datasheet.pdf)