component

74lvc1g384gv-tp

Public Made by Adom

by adom

TECH PUBLIC Analog Switches, Multiplexers, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentinterface74lvc1g384gv-tp
Overview Files Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 74lvc1g384gv-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers 74lvc1g384gv-tp: viewers · Ray 2mo ago
74lvc1g384gv-tp-etched.fit.json 74lvc1g384gv-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g384gv-tp-etched.glb 74lvc1g384gv-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g384gv-tp-etched.step 74lvc1g384gv-tp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g384gv-tp.glb Publish 0.1.0 · Ray 2mo ago
74lvc1g384gv-tp.kicad_mod Publish 0.1.0 · Ray 2mo ago
74lvc1g384gv-tp.kicad_sym Publish 0.1.0 · Ray 2mo ago
74lvc1g384gv-tp.lbr Publish 0.1.0 · Ray 2mo ago
74lvc1g384gv-tp.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.1.0 · Ray 2mo ago
page.json 74lvc1g384gv-tp: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 74lvc1g384gv-tp: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74LVC1G384GV-TP

TECH PUBLIC · Analog Switches, Multiplexers · SOT-23-5

74LVC1G384GV-TP from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y passive Normally-closed analog switch throw. Connected to common port Z when control input E is logic low. Signal range -0.3V to +5.5V; on-resistance typically 3.8-5.6Ω (Ron=6Ω nominal) at IA=30mA.
2 Z passive Common port of the analog switch. Routed to Y when E is low; isolated (off) when E is high. Signal range -0.3V to +5.5V.
3 GND power_in Ground reference (0V).
4 E input Active-low digital control input (E-bar). Z is connected to Y when this pin is logic low (switch ON); switch is OFF when logic high. 1.8V logic compatible; VIH ≥ 1.6V (VCC=3.3-5.5V) or ≥1.4V (VCC=1.5-3.3V); VIL ≤ 0.6V / 0.4V respectively. Input range -0.3V to +5.5V.
5 VCC power_in Positive supply voltage. Recommended operating range 1.6V to 5.5V (absolute max 6.5V). Overrides VCC to achieve true isolation even when supply is dead.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-5
Category Interface
Pins 5

Ordering variants

  • 74LVC1G384GV-TP

CAD (KiCad official)

  • Symbol: 74LVC1G384GV-TP
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g384gv-tp-etched.step / 74lvc1g384gv-tp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g384gv-tp.step / 74lvc1g384gv-tp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (None pp, sha256 ea036d0f59eec5d1, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF