component
74LVC1G3208MDBVTEP
Public Made by Adomby adom
Texas Instruments Logic Gates, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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74LVC1G3208MDBVTEP
Texas Instruments · Logic Gates · SOT-23-6
74LVC1G3208MDBVTEP from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Logic input A of the OR-AND function Y = (A + B) · C. CMOS input, 5.5 V tolerant regardless of VCC; VIH/VIL scale with VCC (e.g. VIH = 2.0 V, VIL = 0.8 V at VCC = 3.3 V). Input hysteresis ≈ 250 mV typ at 3.3 V. |
| 2 | GND | power_in | Ground reference (0 V). Return for VCC supply current and logic reference for A/B/C inputs and Y output. |
| 3 | B | input | Logic input B of the OR-AND function Y = (A + B) · C. CMOS input, 5.5 V tolerant; when tied to GND the device becomes a 2-input AND with Y = A · C. Input hysteresis ≈ 250 mV typ at 3.3 V. |
| 4 | Y | output | Push-pull CMOS logic output implementing Y = (A + B) · C. Drive strength scales with VCC: ±4 mA at 1.65 V, ±16 mA at 3 V, ±24 mA at 3.3 V, ±32 mA at 4.5 V. High-impedance when Ioff / partial-power-down is engaged. |
| 5 | VCC | power_in | Positive supply rail. Operating range 1.65 V to 5.5 V (data retention only down to 1.5 V); absolute max 6.5 V. Bypass to GND with a 0.1 µF ceramic close to the pin. Typical ICC ≤ 12.5 µA (static). |
| 6 | C | input | Logic input C of the OR-AND function Y = (A + B) · C. CMOS input, 5.5 V tolerant; when tied to VCC the device becomes a 2-input OR with Y = A + B. Input hysteresis ≈ 250 mV typ at 3.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Logic |
| Pins | 6 |
Ordering variants
Same part, different packaging or reel option.
74LVC1G3208MDBVTEP
CAD (KiCad official)
- Symbol:
74LVC1G3208MDBVTEP - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
74lvc1g3208mdbvtep-etched.step/74lvc1g3208mdbvtep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc1g3208mdbvtep.step/74lvc1g3208mdbvtep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
921e87b7c8f2bc10, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).