component
74LVC1G3208MDBVTEP
Public Made by Adomby adom
Texas Instruments Logic Gates, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+48@@ -0,0 +1,48 @@+# 74LVC1G3208MDBVTEP++**Texas Instruments** · Logic Gates · SOT-23-6++74LVC1G3208MDBVTEP from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Logic input A of the OR-AND function Y = (A + B) · C. CMOS input, 5.5 V tolerant regardless of VCC; VIH/VIL scale with VCC (e.g. VIH = 2.0 V, VIL = 0.8 V at VCC = 3.3 V). Input hysteresis ≈ 250 mV typ at 3.3 V. |+| 2 | GND | power_in | Ground reference (0 V). Return for VCC supply current and logic reference for A/B/C inputs and Y output. |+| 3 | B | input | Logic input B of the OR-AND function Y = (A + B) · C. CMOS input, 5.5 V tolerant; when tied to GND the device becomes a 2-input AND with Y = A · C. Input hysteresis ≈ 250 mV typ at 3.3 V. |+| 4 | Y | output | Push-pull CMOS logic output implementing Y = (A + B) · C. Drive strength scales with VCC: ±4 mA at 1.65 V, ±16 mA at 3 V, ±24 mA at 3.3 V, ±32 mA at 4.5 V. High-impedance when Ioff / partial-power-down is engaged. |+| 5 | VCC | power_in | Positive supply rail. Operating range 1.65 V to 5.5 V (data retention only down to 1.5 V); absolute max 6.5 V. Bypass to GND with a 0.1 µF ceramic close to the pin. Typical ICC ≤ 12.5 µA (static). |+| 6 | C | input | Logic input C of the OR-AND function Y = (A + B) · C. CMOS input, 5.5 V tolerant; when tied to VCC the device becomes a 2-input OR with Y = A + B. Input hysteresis ≈ 250 mV typ at 3.3 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOT-23-6 |+| Category | Logic |+| Pins | 6 |++## Ordering variants++Same part, different packaging or reel option.++- `74LVC1G3208MDBVTEP`++## CAD (KiCad official)++- Symbol: `74LVC1G3208MDBVTEP`+- Footprint: `Package_TO_SOT_SMD:SOT-23-6`+- 3D model: SOT-23-6 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lvc1g3208-ep) (None pp, sha256 `921e87b7c8f2bc10`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74lvc1g3208mdbvtep-datasheet.pdf)
page.jsonadded+34@@ -0,0 +1,34 @@+{+ "slug": "74lvc1g3208mdbvtep",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Logic Gates, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "74lvc1g3208mdbvtep"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "74lvc1g3208mdbvtep.kicad_sym",+ "74lvc1g3208mdbvtep.kicad_mod",+ "74lvc1g3208mdbvtep.glb",+ "74lvc1g3208mdbvtep.step",+ "74lvc1g3208mdbvtep.lbr",+ "docs/hero.png",+ "docs/74lvc1g3208mdbvtep-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "visibility": "public",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}