← Commit history

74lvc1g3208mdbvtep: factory component page (tier=lcsc)

Ray ·3f6afd3c3b ·1mo ago ·parent 1580bb9
1 file changed +110−8
page.json+110−8
@@ -1,13 +1,120 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "74lvc1g3208mdbvtep",+  "title": "74LVC1G3208MDBVTEP",+  "brief": "Texas Instruments Logic Gates, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Logic Gates, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "74lvc1g3208mdbvtep"   ],+  "component": {+    "mpn": "74LVC1G3208MDBVTEP",+    "manufacturer": "Texas Instruments",+    "package": "SOT-23-6",+    "pin_count": 6,+    "category": "Logic",+    "subcategory": "Logic Gates",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74lvc1g3208-ep",+    "parts": {+      "symbol": "74lvc1g3208mdbvtep.kicad_sym",+      "footprint": "74lvc1g3208mdbvtep.kicad_mod",+      "model_3d": "74lvc1g3208mdbvtep.glb",+      "model_3d_step": "74lvc1g3208mdbvtep.step",+      "lbr": "74lvc1g3208mdbvtep.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A",+        "type": "input",+        "description": "Logic input A of the OR-AND function Y = (A + B) \u00b7 C. CMOS input, 5.5 V tolerant regardless of VCC; VIH/VIL scale with VCC (e.g. VIH = 2.0 V, VIL = 0.8 V at VCC = 3.3 V). Input hysteresis \u2248 250 mV typ at 3.3 V."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Return for VCC supply current and logic reference for A/B/C inputs and Y output."+      },+      {+        "number": "3",+        "name": "B",+        "type": "input",+        "description": "Logic input B of the OR-AND function Y = (A + B) \u00b7 C. CMOS input, 5.5 V tolerant; when tied to GND the device becomes a 2-input AND with Y = A \u00b7 C. Input hysteresis \u2248 250 mV typ at 3.3 V."+      },+      {+        "number": "4",+        "name": "Y",+        "type": "output",+        "description": "Push-pull CMOS logic output implementing Y = (A + B) \u00b7 C. Drive strength scales with VCC: \u00b14 mA at 1.65 V, \u00b116 mA at 3 V, \u00b124 mA at 3.3 V, \u00b132 mA at 4.5 V. High-impedance when Ioff / partial-power-down is engaged."+      },+      {+        "number": "5",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply rail. Operating range 1.65 V to 5.5 V (data retention only down to 1.5 V); absolute max 6.5 V. Bypass to GND with a 0.1 \u00b5F ceramic close to the pin. Typical ICC \u2264 12.5 \u00b5A (static)."+      },+      {+        "number": "6",+        "name": "C",+        "type": "input",+        "description": "Logic input C of the OR-AND function Y = (A + B) \u00b7 C. CMOS input, 5.5 V tolerant; when tied to VCC the device becomes a 2-input OR with Y = A + B. Input hysteresis \u2248 250 mV typ at 3.3 V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74lvc1g3208-ep",+        "pages": null,+        "sha256": "921e87b7c8f2bc10",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOT-23-6",+      "Category": "Logic",+      "Pins": "6"+    }+  },+  "variants": [+    {+      "mpn": "74LVC1G3208MDBVTEP",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "74lvc1g3208mdbvtep"+  ],+  "discovery_pitch": "74LVC1G3208MDBVTEP (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +132,5 @@     "docs/74lvc1g3208mdbvtep-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file