component

74LVC1G17W5-7

Public Made by Adom

by adom

Diodes Incorporated Buffer/Driver/Transceiver, SOT-25-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogic74lvc1g17w5-7
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 74lvc1g17w5-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
74lvc1g17w5-7-etched.fit.json 74lvc1g17w5-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
74lvc1g17w5-7-etched.glb 74lvc1g17w5-7: one-pass backfill (re-etched) · Ray
74lvc1g17w5-7-etched.step 74lvc1g17w5-7: one-pass backfill (re-etched) · Ray
74lvc1g17w5-7-hero.glb Publish 0.2.1 · Ray
74lvc1g17w5-7-hero.overlay.json Publish 0.2.1 · Ray
74lvc1g17w5-7.glb Publish 0.1.0 · Ray
74lvc1g17w5-7.kicad_mod Publish 0.1.0 · Ray
74lvc1g17w5-7.kicad_sym Publish 0.1.0 · Ray
74lvc1g17w5-7.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
74lvc1g17w5-7.step Publish 0.1.0 · Ray
package.json Publish 0.2.2 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.2 · Ray
README.md 74lvc1g17w5-7: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

74LVC1G17W5-7

Diodes Incorporated · Buffer/Driver/Transceiver · SOT-25-5

74LVC1G17W5-7 from Diodes Incorporated, in a SOT-25-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. May be left floating or tied to VCC/GND.
2 A input Schmitt-trigger data input. Accepts up to 5.5 V regardless of VCC (5.5 V-tolerant). Typical hysteresis 0.35 V at VCC = 3 V (VT+ ~1.5-2.0 V, VT- ~0.8-1.3 V).
3 GND power_in Ground reference (0 V).
4 Y output Push-pull buffered data output. Y = A. Drives ±24 mA at VCC = 3 V (up to ±32 mA at 4.5 V).
5 VCC power_in Positive supply voltage, 1.65 V to 5.5 V operating range (1.5 V data-retention minimum). Absolute max 6.5 V. Typical ICC ≤ 10 µA.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-25-5
Category Logic
Pins 5

Ordering variants

  • 74LVC1G17W5-7
  • 74LVC1G17W5-7SE-7
  • 74LVC1G17W5-7Z-7
  • 74LVC1G17W5-7FS3-7
  • 74LVC1G17W5-7FW4-7
  • 74LVC1G17W5-7FX4-7
  • 74LVC1G17W5-7FZ4-7

CAD (KiCad official)

  • Symbol: 74LVC1G17W5-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-25-5 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g17w5-7-etched.step / 74lvc1g17w5-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g17w5-7.step / 74lvc1g17w5-7.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
74lvc1g17w5-7.step 85 KB You want the bare part, or you mark your own boards.
74lvc1g17w5-7-etched.step 1.6 MB You want the part with 74LVC1G17W5-7 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 427 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (18 pp, sha256 029f345a1e7be917, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF