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74LVC1G157GS

Nexperia · Signal Switches, Multiplexers, Decoders · XSON-6(1x1)

74LVC1G157GS from Nexperia, in a XSON-6(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I1 input Data input from source 1; inputs are overvoltage tolerant, with a recommended input voltage range of 0 V to 5.5 V.
2 GND power_in Ground (0 V) reference for all voltages in the device.
3 I0 input Data input from source 0; inputs are overvoltage tolerant, with a recommended input voltage range of 0 V to 5.5 V.
4 Y output Multiplexer output, specified for ±24 mA drive at VCC = 3.0 V, and disabled through the IOFF circuitry when powered down.
5 VCC power_in Supply voltage; recommended operating range 1.65 V to 5.5 V.
6 S input Common data select input; Schmitt-trigger input, overvoltage tolerant to 5.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package XSON-6(1x1)
Category Logic
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 6.5 V 4
input clamping current IIK -50 mA VI < 0 V 4
input voltage VI -0.5 6.5 V 4
output clamping current IOK -50 50 mA VO > VCC or VO < 0 V 4
output voltage, active mode VO -0.5 V Active mode 4
output voltage, power-down mode VO -0.5 6.5 V Power-down mode; VCC = 0 V 4
output current IO -50 50 mA VO = 0 V to VCC 4
supply current ICC 100 mA 4
ground current IGND -100 mA 4
total power dissipation Ptot 250 mW Tamb = -40 °C to +125 °C 4
storage temperature Tstg -65 150 °C 4
supply voltage VCC 1.65 5.5 V 4
input voltage VI 0 5.5 V 4
output voltage, power-down mode VO 5.5 V Power-down mode; VCC = 0 V 4
ambient temperature Tamb -40 125 °C 4
input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 1.65 V to 2.7 V 4
input transition rise and fall rate Δt/ΔV 10 ns/V VCC = 2.7 V to 5.5 V 4
HIGH-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 5
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V 5
LOW-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 5
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V 5
HIGH-level output voltage VOH 0.95 V VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V 5
HIGH-level output voltage VOH 1.7 V VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V 5
HIGH-level output voltage VOH 1.9 V VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V 5
HIGH-level output voltage VOH 2 V VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V 5
HIGH-level output voltage VOH 3.4 V VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V 5
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V 5
LOW-level output voltage VOL 0.7 V VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V 5
LOW-level output voltage VOL 0.45 V VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V 5
LOW-level output voltage VOL 0.6 V VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V 5
LOW-level output voltage VOL 0.8 V VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V 5
input leakage current II -1 1 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V 5
power-off leakage current IOFF -2 2 μA VCC = 0 V; VI or VO = 5.5 V 5
supply current ICC 4 μA VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V 5
additional supply current ΔICC 500 μA per pin; VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A 5
propagation delay I0, I1 to Y tpd 1.5 13 ns I0, I1 to Y; see Fig. 8; VCC = 1.65 V to 1.95 V 6
propagation delay I0, I1 to Y tpd 1 7.6 ns I0, I1 to Y; see Fig. 8; VCC = 2.3 V to 2.7 V 6
propagation delay I0, I1 to Y tpd 1 7 ns I0, I1 to Y; see Fig. 8; VCC = 2.7 V 6
propagation delay I0, I1 to Y tpd 1 6.3 ns I0, I1 to Y; see Fig. 8; VCC = 3.0 V to 3.6 V 6
propagation delay I0, I1 to Y tpd 0.5 5 ns I0, I1 to Y; see Fig. 8; VCC = 4.5 V to 5.5 V 6
propagation delay S to Y tpd 1.5 13 ns S to Y; see Fig. 8; VCC = 1.65 V to 1.95 V 6
propagation delay S to Y tpd 1 8.6 ns S to Y; see Fig. 8; VCC = 2.3 V to 2.7 V 6
propagation delay S to Y tpd 1 7.4 ns S to Y; see Fig. 8; VCC = 2.7 V 6
propagation delay S to Y tpd 1 6.3 ns S to Y; see Fig. 8; VCC = 3.0 V to 3.6 V 6
propagation delay S to Y tpd 0.5 5 ns S to Y; see Fig. 8; VCC = 4.5 V to 5.5 V 6

CAD (KiCad official)

  • Symbol: 74LVC1G157GS
  • Footprint: Package_TO_SOT_SMD:SOT-886
  • 3D model: XSON-6(1x1) (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g157gs-etched.step / 74lvc1g157gs-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g157gs.step / 74lvc1g157gs.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 62f9b85c44785ca1, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF