component

74LVC1G08GW

Public Made by Adom

by adom

Nexperia Gates, SOT-353. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 74lvc1g08gw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
74lvc1g08gw-etched.fit.json 74lvc1g08gw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g08gw-etched.glb 74lvc1g08gw: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 12d ago
74lvc1g08gw-etched.step 74lvc1g08gw: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 12d ago
74lvc1g08gw.glb Publish 0.1.0 · Ray 2mo ago
74lvc1g08gw.kicad_mod Publish 0.1.0 · Ray 2mo ago
74lvc1g08gw.kicad_sym Publish 0.1.0 · Ray 2mo ago
74lvc1g08gw.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
74lvc1g08gw.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 74lvc1g08gw: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 12d ago
README.md 74lvc1g08gw: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74LVC1G08GW

Nexperia · Gates · SOT-353

74LVC1G08GW from Nexperia, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Data input B to the 2-input AND gate. Schmitt-trigger input tolerant to 5.5 V independent of VCC.
2 A input Data input A to the 2-input AND gate. Schmitt-trigger input tolerant to 5.5 V independent of VCC.
3 GND power_in Ground (0 V) reference for the device.
4 Y output Data output Y = A AND B. Push-pull CMOS output; drives ±24 mA at VCC = 3.0 V.
5 VCC power_in Supply voltage input. Recommended operating range 1.65 V to 5.5 V; absolute max +6.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-353
Category Logic
Pins 5

Ordering variants

  • 74LVC1G08GW
  • 74LVC1G08GWGV
  • 74LVC1G08GWGM
  • 74LVC1G08GWGN
  • 74LVC1G08GWGS
  • 74LVC1G08GWGX
  • 74LVC1G08GWGZ

CAD (KiCad official)

  • Symbol: 74LVC1G08GW
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g08gw-etched.step / 74lvc1g08gw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g08gw.step / 74lvc1g08gw.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
74lvc1g08gw.step 87 KB You want the bare part, or you mark your own boards.
74lvc1g08gw-etched.step 1.9 MB You want the part with 74LVC1G08GW already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 484 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (17 pp, sha256 b80ac1e8f04bb4c1, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF