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74LVC1G08DCKRG
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HANSCHIP semiconductor Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74LVC1G08DCKRG
HANSCHIP semiconductor · Logic Gates · SC-70-5
74LVC1G08DCKRG from HANSCHIP semiconductor, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Logic input A of the 2-input AND gate; the recommended input voltage range is 0 V to 5.5 V. |
| 2 | B | input | Logic input B of the 2-input AND gate; the recommended input voltage range is 0 V to 5.5 V. |
| 3 | GND | power_in | Power ground (0 V) reference for the device. |
| 4 | Y | output | AND-gate output (Y = A·B); the output voltage ranges from 0 V to VCC, and the datasheet lists output current of ±32 mA at VCC = 4.5 V. |
| 5 | VCC | power_in | Positive supply pin; the operating supply voltage range is 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | 6.5 | V | 3 | |||
| Input voltage (absolute maximum) | VIN | -0.5 | 6.5 | V | 3 | ||
| Output voltage (absolute maximum) | VOUT | -0.5 | 6.5 | V | VCC=0V power-off (note 1) | 3 | |
| Output current per pin (absolute maximum) | IOUT | 25 | mA | 3 | |||
| VCC or GND current (absolute maximum) | ICC | 50 | mA | 3 | |||
| Storage temperature | TS | -65 | 150 | ℃ | 3 | ||
| Operating temperature | TA | -25 | 70 | ℃ | 3 | ||
| Lead soldering temperature | TW | 245 | ℃ | 10 s | 3 | ||
| Supply voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| High-level input voltage, factor of VCC | VIH | 0.65 | *VCC | VCC=1.65V~1.95V | 4 | ||
| High-level input voltage | VIH | 1.7 | V | VCC=2.3V~2.7V | 4 | ||
| High-level input voltage, factor of VCC | VIH | 0.7 | *VCC | VCC=3V~5.5V | 4 | ||
| Low-level input voltage, factor of VCC | VIL | 0.35 | *VCC | VCC=1.65V~1.95V | 4 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC=2.3V~2.7V | 4 | ||
| Low-level input voltage, factor of VCC | VIL | 0.3 | *VCC | VCC=3V~5.5V | 4 | ||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage (max equals VCC) | VO | 0 | V | 4 | |||
| High-level output current | IOH | -4 | mA | VCC=1.65V | 4 | ||
| High-level output current | IOH | -8 | mA | VCC=2.3V | 4 | ||
| High-level output current | IOH | -16 | mA | VCC=3V | 4 | ||
| High-level output current | IOH | -32 | mA | VCC=4.5V | 4 | ||
| Low-level output current | IOL | 4 | mA | VCC=1.65V | 4 | ||
| Low-level output current | IOL | 8 | mA | VCC=2.3V | 4 | ||
| Low-level output current | IOL | 16 | mA | VCC=3V | 4 | ||
| Low-level output current | IOL | 32 | mA | VCC=4.5V | 4 | ||
| Input current (pin A) | II | -5 | 0.01 | 5 | uA | TA=25°C; VI=5.5V or GND; VCC 0~5.5V | 5 |
| Input current (pin B) | II | -5 | 0.01 | 5 | uA | TA=25°C; VI=5.5V or GND; VCC 0~5.5V | 5 |
| Power-off leakage current (input) | IOFF | -10 | 0.01 | 10 | uA | TA=25°C; VI=5.5V; VCC=0V | 5 |
| Power-off leakage current (output) | IOFF | -10 | 0.01 | 10 | uA | TA=25°C; VO=5.5V; VCC=0V | 5 |
| Quiescent supply current | ICC | 0.01 | 10 | uA | TA=25°C; VI=5.5V, IO=0; VCC 1.65V~5.5V | 5 |
CAD (KiCad official)
- Symbol:
74LVC1G08DCKRG - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
74lvc1g08dckrg-etched.step/74lvc1g08dckrg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc1g08dckrg.step/74lvc1g08dckrg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (8 pp, sha256
522e3cb0814b2be1, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVC1G08DCKRG
**HANSCHIP semiconductor** · Logic Gates · SC-70-5
74LVC1G08DCKRG from HANSCHIP semiconductor, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Logic input A of the 2-input AND gate; the recommended input voltage range is 0 V to 5.5 V. |
| 2 | B | input | Logic input B of the 2-input AND gate; the recommended input voltage range is 0 V to 5.5 V. |
| 3 | GND | power_in | Power ground (0 V) reference for the device. |
| 4 | Y | output | AND-gate output (Y = A·B); the output voltage ranges from 0 V to VCC, and the datasheet lists output current of ±32 mA at VCC = 4.5 V. |
| 5 | VCC | power_in | Positive supply pin; the operating supply voltage range is 1.65 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | | | 6.5 | V | | 3 |
| Input voltage (absolute maximum) | VIN | -0.5 | | 6.5 | V | | 3 |
| Output voltage (absolute maximum) | VOUT | -0.5 | | 6.5 | V | VCC=0V power-off (note 1) | 3 |
| Output current per pin (absolute maximum) | IOUT | | | 25 | mA | | 3 |
| VCC or GND current (absolute maximum) | ICC | | | 50 | mA | | 3 |
| Storage temperature | TS | -65 | | 150 | ℃ | | 3 |
| Operating temperature | TA | -25 | | 70 | ℃ | | 3 |
| Lead soldering temperature | TW | | | 245 | ℃ | 10 s | 3 |
| Supply voltage | VCC | 1.65 | | 5.5 | V | | 4 |
| High-level input voltage, factor of VCC | VIH | 0.65 | | | *VCC | VCC=1.65V~1.95V | 4 |
| High-level input voltage | VIH | 1.7 | | | V | VCC=2.3V~2.7V | 4 |
| High-level input voltage, factor of VCC | VIH | 0.7 | | | *VCC | VCC=3V~5.5V | 4 |
| Low-level input voltage, factor of VCC | VIL | | | 0.35 | *VCC | VCC=1.65V~1.95V | 4 |
| Low-level input voltage | VIL | | | 0.7 | V | VCC=2.3V~2.7V | 4 |
| Low-level input voltage, factor of VCC | VIL | | | 0.3 | *VCC | VCC=3V~5.5V | 4 |
| Input voltage | VI | 0 | | 5.5 | V | | 4 |
| Output voltage (max equals VCC) | VO | 0 | | | V | | 4 |
| High-level output current | IOH | | | -4 | mA | VCC=1.65V | 4 |
| High-level output current | IOH | | | -8 | mA | VCC=2.3V | 4 |
| High-level output current | IOH | | | -16 | mA | VCC=3V | 4 |
| High-level output current | IOH | | | -32 | mA | VCC=4.5V | 4 |
| Low-level output current | IOL | | | 4 | mA | VCC=1.65V | 4 |
| Low-level output current | IOL | | | 8 | mA | VCC=2.3V | 4 |
| Low-level output current | IOL | | | 16 | mA | VCC=3V | 4 |
| Low-level output current | IOL | | | 32 | mA | VCC=4.5V | 4 |
| Input current (pin A) | II | -5 | 0.01 | 5 | uA | TA=25°C; VI=5.5V or GND; VCC 0~5.5V | 5 |
| Input current (pin B) | II | -5 | 0.01 | 5 | uA | TA=25°C; VI=5.5V or GND; VCC 0~5.5V | 5 |
| Power-off leakage current (input) | IOFF | -10 | 0.01 | 10 | uA | TA=25°C; VI=5.5V; VCC=0V | 5 |
| Power-off leakage current (output) | IOFF | -10 | 0.01 | 10 | uA | TA=25°C; VO=5.5V; VCC=0V | 5 |
| Quiescent supply current | ICC | | 0.01 | 10 | uA | TA=25°C; VI=5.5V, IO=0; VCC 1.65V~5.5V | 5 |
## CAD (KiCad official)
- Symbol: `74LVC1G08DCKRG`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `74lvc1g08dckrg-etched.step` / `74lvc1g08dckrg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc1g08dckrg.step` / `74lvc1g08dckrg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757861942365577216) (8 pp, sha256 `522e3cb0814b2be1`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvc1g08dckrg-datasheet.pdf)