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74LVC1G08DBVR
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Slkor SLKORMICRO Elec Logic Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74LVC1G08DBVR
Slkor SLKORMICRO Elec · Logic Gates · SOT-23-5
74LVC1G08DBVR from Slkor SLKORMICRO Elec, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Gate input A; logic high threshold is 0.65VCC at 1.65-1.95V and 0.7VCC at 3-5.5V, input voltage 0 to 5.5V. |
| 2 | B | input | Gate input B; logic high threshold is 0.65VCC at 1.65-1.95V and 0.7VCC at 3-5.5V, input voltage 0 to 5.5V. |
| 3 | GND | power_in | Power ground. |
| 4 | Y | output | AND gate output Y = A·B, drives up to 32 mA at VCC=4.5V. |
| 5 | VCC | power_in | Positive supply, operating range 1.65V to 5.5V (absolute maximum 6.5V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Slkor SLKORMICRO Elec |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
74LVC1G08DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
74lvc1g08dbvr-etched.step/74lvc1g08dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc1g08dbvr.step/74lvc1g08dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Slkor SLKORMICRO Elec datasheet (4 pp, sha256
d43828dbe80dc0e9, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVC1G08DBVR
**Slkor SLKORMICRO Elec** · Logic Gates · SOT-23-5
74LVC1G08DBVR from Slkor SLKORMICRO Elec, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Gate input A; logic high threshold is 0.65*VCC at 1.65-1.95V and 0.7*VCC at 3-5.5V, input voltage 0 to 5.5V. |
| 2 | B | input | Gate input B; logic high threshold is 0.65*VCC at 1.65-1.95V and 0.7*VCC at 3-5.5V, input voltage 0 to 5.5V. |
| 3 | GND | power_in | Power ground. |
| 4 | Y | output | AND gate output Y = A·B, drives up to 32 mA at VCC=4.5V. |
| 5 | VCC | power_in | Positive supply, operating range 1.65V to 5.5V (absolute maximum 6.5V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Slkor SLKORMICRO Elec |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `74LVC1G08DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `74lvc1g08dbvr-etched.step` / `74lvc1g08dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc1g08dbvr.step` / `74lvc1g08dbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Slkor SLKORMICRO Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602998665992949760) (4 pp, sha256 `d43828dbe80dc0e9`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvc1g08dbvr-datasheet.pdf)