component
74LVC1G02SE-7
Public Made by Adomby adom
Diodes Incorporated Gates, SOT-353. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
2 files changed
+177−1
package.json+2−1@@ -24,6 +24,7 @@ "docs/hero.png", "docs/74lvc1g02se-7-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ] }
pads.jsonadded+175@@ -0,0 +1,175 @@+{+ "schema": "adom.pads/1",+ "slug": "74lvc1g02se-7",+ "footprint": "SOT-353_SC-70-5",+ "generated_from": {+ "footprint": "SOT-353_SC-70-5@sha256:869e17094994ff78",+ "pins": "page.json:component.pins",+ "overrides": null+ },+ "pin1": {+ "pad": "1",+ "at": [+ -0.8375,+ -0.65+ ],+ "corner": "top-left",+ "source": "silk-marker",+ "derived_from": "SOT-353_SC-70-5@sha256:869e17094994ff78"+ },+ "pad_count": 5,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+ {+ "pad": "1",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -0.8375,+ -0.65+ ],+ "rot": 0.0,+ "size": [+ 1.025,+ 0.35+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "1",+ "name": "A",+ "type": "input",+ "description": "Data input A of the 2-input NOR gate. CMOS/TTL-compatible logic input, tolerant up to 5.5 V regardless of VCC. Y = NOT(A + B).",+ "is_pin1": true,+ "source": {+ "geometry": "SOT-353_SC-70-5.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "2",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -0.8375,+ 0.0+ ],+ "rot": 0.0,+ "size": [+ 1.025,+ 0.35+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "2",+ "name": "B",+ "type": "input",+ "description": "Data input B of the 2-input NOR gate. CMOS/TTL-compatible logic input, tolerant up to 5.5 V regardless of VCC. Y = NOT(A + B).",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-353_SC-70-5.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "3",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ -0.8375,+ 0.65+ ],+ "rot": 0.0,+ "size": [+ 1.025,+ 0.35+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). Connect to the system ground plane.",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-353_SC-70-5.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "4",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 0.8375,+ 0.65+ ],+ "rot": 0.0,+ "size": [+ 1.025,+ 0.35+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "4",+ "name": "Y",+ "type": "output",+ "description": "Push-pull NOR gate data output. Y = NOT(A + B). Sources/sinks up to ±24 mA at VCC = 3.3 V (up to ±32 mA at 4.5 V).",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-353_SC-70-5.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "5",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 0.8375,+ -0.65+ ],+ "rot": 0.0,+ "size": [+ 1.025,+ 0.35+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage input. Operating range 1.65 V to 5.5 V (data retention only down to 1.5 V). Decouple with a local bypass capacitor to GND.",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-353_SC-70-5.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ }+ ]+}