component
74LVC1G02GM
Public Made by Adomby adom
Nexperia Gates, XSON-6(1x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74LVC1G02GM
Nexperia · Gates · XSON-6(1x1.5)
74LVC1G02GM from Nexperia, in a XSON-6(1x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Data input B of the NOR gate, overvoltage tolerant to 5.5 V with Schmitt-trigger action. |
| 2 | A | input | Data input A of the NOR gate, overvoltage tolerant to 5.5 V with Schmitt-trigger action. |
| 3 | GND | power_in | Ground (0 V). |
| 4 | Y | output | Data output of the NOR gate, with ±24 mA drive at VCC = 3.0 V. |
| 5 | n.c. | unconnected | Not connected. |
| 6 | VCC | power_in | Supply voltage, 1.65 V to 5.5 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | XSON-6(1x1.5) |
| Category | Logic ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| Input clamping current | IIK | -50 | mA | VI < 0 V | 4 | ||
| Input voltage | VI | -0.5 | 6.5 | V | 4 | ||
| Output clamping current | IOK | 50 | mA | VO > VCC or VO < 0 V; printed ±50 | 4 | ||
| Output voltage, active mode | VO | -0.5 | 6.5 | V | Active mode; max printed VCC + 0.5 V | 4 | |
| Output voltage, power-down mode | VO | -0.5 | 6.5 | V | Power-down mode; VCC = 0 V | 4 | |
| Output current | IO | 50 | mA | VO = 0 V to VCC; printed ±50 | 4 | ||
| Supply current | ICC | 100 | mA | 4 | |||
| Ground current | IGND | -100 | mA | 4 | |||
| Total power dissipation | Ptot | 250 | mW | Tamb = -40 °C to +125 °C; SOT886 derates linearly 3.3 mW/K above 74 °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage, active mode | VO | 0 | V | Active mode; max printed VCC | 4 | ||
| Output voltage, power-down mode | VO | 0 | 5.5 | V | Power-down mode; VCC = 0 V | 4 | |
| Ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 1.65 V to 2.7 V | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 10 | ns/V | VCC = 2.7 V to 5.5 V | 4 | ||
| HIGH-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V; -40 °C to +85 °C | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC = 2.7 V to 3.6 V; -40 °C to +85 °C | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V; -40 °C to +85 °C | 5 | ||
| LOW-level input voltage | VIL | 0.8 | V | VCC = 2.7 V to 3.6 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 1.2 | V | VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 1.9 | V | VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 2.2 | V | VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 2.3 | V | VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V; -40 °C to +85 °C | 5 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VI = VIH or VIL; IO = -32 mA; VCC = 4.5 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.1 | V | VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 5.5 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.45 | V | VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.3 | V | VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.4 | V | VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V; -40 °C to +85 °C | 5 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V; -40 °C to +85 °C | 5 | ||
| Input leakage current | II | -1 | 0.1 | 1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +85 °C; typ printed ±0.1 | 5 |
| Input leakage current | II | -1 | 1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C | 5 | |
| Power-off leakage current | IOFF | -2 | 0.1 | 2 | μA | VCC = 0 V; VI or VO = 5.5 V; -40 °C to +85 °C; typ printed ±0.1 | 5 |
| Power-off leakage current | IOFF | -2 | 2 | μA | VCC = 0 V; VI or VO = 5.5 V; -40 °C to +125 °C | 5 | |
| Supply current | ICC | 0.1 | 4 | μA | VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V; -40 °C to +85 °C | 5 | |
| Supply current | ICC | 4 | μA | VI = 5.5 V or GND; IO = 0 A; VCC = 1.65 V to 5.5 V; -40 °C to +125 °C | 5 | ||
| Additional supply current | ΔICC | 5 | 500 | μA | VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A; per pin; -40 °C to +85 °C | 5 | |
| Additional supply current | ΔICC | 500 | μA | VCC = 2.3 V to 5.5 V; VI = VCC - 0.6 V; IO = 0 A; per pin; -40 °C to +125 °C | 5 | ||
| Propagation delay A, B to Y | tpd | 1 | 3.2 | 8 | ns | VCC = 1.65 V to 1.95 V; -40 °C to +85 °C | 6 |
| Propagation delay A, B to Y | tpd | 0.5 | 2.2 | 5.5 | ns | VCC = 2.3 V to 2.7 V; -40 °C to +85 °C | 6 |
| Propagation delay A, B to Y | tpd | 0.5 | 2.5 | 5.5 | ns | VCC = 2.7 V; -40 °C to +85 °C | 6 |
| Propagation delay A, B to Y | tpd | 0.5 | 2.1 | 4.5 | ns | VCC = 3.0 V to 3.6 V; -40 °C to +85 °C | 6 |
| Propagation delay A, B to Y | tpd | 0.5 | 1.7 | 4 | ns | VCC = 4.5 V to 5.5 V; -40 °C to +85 °C | 6 |
| Propagation delay A, B to Y | tpd | 1 | 10.5 | ns | VCC = 1.65 V to 1.95 V; -40 °C to +125 °C | 6 | |
| Propagation delay A, B to Y | tpd | 0.5 | 7 | ns | VCC = 2.3 V to 2.7 V; -40 °C to +125 °C | 6 | |
| Propagation delay A, B to Y | tpd | 0.5 | 6 | ns | VCC = 3.0 V to 3.6 V; -40 °C to +125 °C | 6 | |
| Propagation delay A, B to Y | tpd | 0.5 | 5.5 | ns | VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | |
| Input capacitance | CI | 5 | pF | VCC = 3.3 V; VI = GND to VCC | 5 | ||
| Power dissipation capacitance | CPD | 14 | pF | VI = GND to VCC; VCC = 3.3 V | 6 |
CAD (KiCad official)
- Symbol:
74LVC1G02GM - Footprint:
Package_SON:Texas_USON-6_1x1.45mm_P0.5mm_SMD - 3D model: XSON-6(1x1.5) (KiCad packages3D, STEP)
- 3D model files:
74lvc1g02gm-etched.step/74lvc1g02gm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc1g02gm.step/74lvc1g02gm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
4bd3838ab65f31f1, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).