component
74LVC1G00GW
Public Made by Adomby adom
Nexperia Gates, SOT-353. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+124−8@@ -1,13 +1,134 @@ {+ "schema_version": 1,+ "type": "component", "slug": "74lvc1g00gw",+ "title": "74LVC1G00GW",+ "brief": "Nexperia Gates, SOT-353. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Nexperia Gates, SOT-353. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "74lvc1g00gw" ],+ "component": {+ "mpn": "74LVC1G00GW",+ "manufacturer": "Nexperia",+ "package": "SOT-353",+ "pin_count": 5,+ "category": "Logic",+ "subcategory": "Gates",+ "datasheet": "https://assets.nexperia.com/documents/data-sheet/74LVC1G00GW.pdf",+ "parts": {+ "symbol": "74lvc1g00gw.kicad_sym",+ "footprint": "74lvc1g00gw.kicad_mod",+ "model_3d": "74lvc1g00gw.glb",+ "model_3d_step": "74lvc1g00gw.step",+ "lbr": "74lvc1g00gw.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "B",+ "type": "input",+ "description": "Data input B to the 2-input NAND gate. Schmitt-trigger input; overvoltage tolerant to 5.5 V regardless of VCC. Input leakage typ \u00b10.1 \u00b5A, max \u00b11 \u00b5A."+ },+ {+ "number": "2",+ "name": "A",+ "type": "input",+ "description": "Data input A to the 2-input NAND gate. Schmitt-trigger input; overvoltage tolerant to 5.5 V regardless of VCC. Input leakage typ \u00b10.1 \u00b5A, max \u00b11 \u00b5A."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). All voltages in the datasheet are referenced to this pin."+ },+ {+ "number": "4",+ "name": "Y",+ "type": "output",+ "description": "Data output; Y = NAND(A, B). Push-pull CMOS output rated \u00b124 mA drive at VCC = 3.0 V. Output disabled when VCC = 0 V via IOFF circuitry."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage, 1.65 V to 5.5 V (absolute max 6.5 V). Supply current ICC max 4 \u00b5A. Bypass with a 100 nF ceramic capacitor to GND close to the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://assets.nexperia.com/documents/data-sheet/74LVC1G00GW.pdf",+ "pages": 16,+ "sha256": "5263b49b15014824",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 5,+ "described": 5,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Nexperia",+ "Package": "SOT-353",+ "Category": "Logic",+ "Pins": "5"+ }+ },+ "variants": [+ {+ "mpn": "74LVC1G00GW",+ "kind": "packaging"+ },+ {+ "mpn": "74LVC1G00GWGV",+ "kind": "packaging"+ },+ {+ "mpn": "74LVC1G00GWGM",+ "kind": "packaging"+ },+ {+ "mpn": "74LVC1G00GWGN",+ "kind": "packaging"+ },+ {+ "mpn": "74LVC1G00GWGS",+ "kind": "packaging"+ },+ {+ "mpn": "74LVC1G00GWGX",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "74lvc1g00gw"+ ],+ "discovery_pitch": "74LVC1G00GW (Nexperia) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +146,5 @@ "docs/74lvc1g00gw-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }