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74LVC1G00DBVRG

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HANSCHIP semiconductor Gates, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs 74lvc1g00dbvrg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers 74lvc1g00dbvrg: viewers · Ray 1mo ago
74lvc1g00dbvrg-etched.fit.json 74lvc1g00dbvrg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74lvc1g00dbvrg-etched.glb 74lvc1g00dbvrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 12d ago
74lvc1g00dbvrg-etched.step 74lvc1g00dbvrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 12d ago
74lvc1g00dbvrg.glb Publish 0.1.0 · Ray 1mo ago
74lvc1g00dbvrg.kicad_mod Publish 0.1.0 · Ray 1mo ago
74lvc1g00dbvrg.kicad_sym Publish 0.1.0 · Ray 1mo ago
74lvc1g00dbvrg.lbr Publish 0.1.0 · Ray 1mo ago
74lvc1g00dbvrg.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json 74lvc1g00dbvrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray 12d ago
README.md 74lvc1g00dbvrg: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74LVC1G00DBVRG

HANSCHIP semiconductor · Gates · SOT-23-5

74LVC1G00DBVRG from HANSCHIP semiconductor, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Logic input A of the 2-input NAND gate. CMOS input, VIH >= 0.7*VCC (for VCC 3-5.5 V); tolerates 0 to 5.5 V regardless of VCC (5 V-tolerant).
2 B input Logic input B of the 2-input NAND gate. CMOS input, VIH >= 0.7*VCC (for VCC 3-5.5 V); tolerates 0 to 5.5 V regardless of VCC (5 V-tolerant).
3 GND power_in Ground / negative supply return (0 V reference).
4 Y output NAND gate output, Y = NOT(A AND B). Push-pull CMOS output; sinks/sources up to 32 mA at VCC = 4.5 V (16 mA @ 3 V, 8 mA @ 2.3 V, 4 mA @ 1.65 V).
5 VCC power_in Positive supply, 1.65 V to 5.5 V operating range (absolute max 6.5 V). Decouple with a local bypass capacitor to GND.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • 74LVC1G00DBVRG
  • 74LVC1G00DBVRGDCKRG

CAD (KiCad official)

  • Symbol: 74LVC1G00DBVRG
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g00dbvrg-etched.step / 74lvc1g00dbvrg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g00dbvrg.step / 74lvc1g00dbvrg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (8 pp, sha256 5d2b6cc658b79d9d, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF