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74LVC139PW

Public Made by Adom

by adom

Nexperia Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74LVC139PW

Nexperia · Signal Switches, Multiplexers, Decoders · TSSOP-16

74LVC139PW from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1E input Enable input 1E is active LOW; when it is HIGH all outputs of decoder 1 (1Y0 to 1Y3) are forced HIGH.
2 1A0 input Address input 1A0 is one of the two binary-weighted address inputs of decoder 1; inputs are overvoltage tolerant to 5.5 V.
3 1A1 input Address input 1A1 is one of the two binary-weighted address inputs of decoder 1; inputs are overvoltage tolerant to 5.5 V.
4 1Y0 output Mutually exclusive output 1Y0 of decoder 1, selected by the address inputs when 1E is LOW.
5 1Y1 output Mutually exclusive output 1Y1 of decoder 1, selected by the address inputs when 1E is LOW.
6 1Y2 output Mutually exclusive output 1Y2 of decoder 1, selected by the address inputs when 1E is LOW.
7 1Y3 output Mutually exclusive output 1Y3 of decoder 1, selected by the address inputs when 1E is LOW.
8 GND power_in Ground (0 V) reference for all voltages on the device.
9 2Y3 output Mutually exclusive output 2Y3 of decoder 2, selected by the address inputs when 2E is LOW.
10 2Y2 output Mutually exclusive output 2Y2 of decoder 2, selected by the address inputs when 2E is LOW.
11 2Y1 output Mutually exclusive output 2Y1 of decoder 2, selected by the address inputs when 2E is LOW.
12 2Y0 output Mutually exclusive output 2Y0 of decoder 2, selected by the address inputs when 2E is LOW.
13 2A1 input Address input 2A1 is one of the two binary-weighted address inputs of decoder 2; inputs are overvoltage tolerant to 5.5 V.
14 2A0 input Address input 2A0 is one of the two binary-weighted address inputs of decoder 2; inputs are overvoltage tolerant to 5.5 V.
15 2E input Enable input 2E is active LOW; when it is HIGH all outputs of decoder 2 (2Y0 to 2Y3) are forced HIGH.
16 VCC power_in Positive supply voltage; recommended operating range is 1.65 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6.5 V 3
Input clamping current IIK -50 mA VI < 0 3
Input voltage VI -0.5 6.5 V Footnote [1]: minimum input voltage may be exceeded if input current ratings are observed 3
Output clamping current IOK -50 50 mA VO > VCC or VO < 0 V 3
Output voltage VO -0.5 V Footnote [2]: max printed as VCC + 0.5 V; may be exceeded if output current ratings are observed 3
Output current IO -50 50 mA VO = 0 V to VCC 3
Supply current ICC 100 mA 3
Ground current IGND -100 mA 3
Storage temperature Tstg -65 150 °C 3
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C; TSSOP16 SOT403-1 derates linearly 8.5 mW/K above 91 °C 3
Supply voltage VCC 1.65 3.6 V 4
Functional supply voltage 1.2 V functional 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V 4
Ambient temperature Tamb -40 125 °C in free air 4
Input transition rise and fall rate Δt/ΔV 0 20 ns/V VCC = 1.65 V to 2.7 V 4
Input transition rise and fall rate Δt/ΔV 0 10 ns/V VCC = 2.7 V to 3.6 V 4
HIGH-level input voltage VIH 1.08 V Tamb -40 °C to +125 °C; VCC = 1.2 V 4
HIGH-level input voltage VIH 1.7 V Tamb -40 °C to +125 °C; VCC = 2.3 V to 2.7 V 4
HIGH-level input voltage VIH 2 V Tamb -40 °C to +125 °C; VCC = 2.7 V to 3.6 V 4
LOW-level input voltage VIL 0.12 V Tamb -40 °C to +125 °C; VCC = 1.2 V 4
LOW-level input voltage VIL 0.7 V Tamb -40 °C to +125 °C; VCC = 2.3 V to 2.7 V 4
LOW-level input voltage VIL 0.8 V Tamb -40 °C to +125 °C; VCC = 2.7 V to 3.6 V 4
HIGH-level output voltage VOH 1.05 V Tamb -40 °C to +125 °C; IO = -4 mA; VCC = 1.65 V 4
HIGH-level output voltage VOH 1.65 V Tamb -40 °C to +125 °C; IO = -8 mA; VCC = 2.3 V 4
HIGH-level output voltage VOH 2.05 V Tamb -40 °C to +125 °C; IO = -12 mA; VCC = 2.7 V 4
HIGH-level output voltage VOH 2.25 V Tamb -40 °C to +125 °C; IO = -18 mA; VCC = 3.0 V 4
HIGH-level output voltage VOH 2 V Tamb -40 °C to +125 °C; IO = -24 mA; VCC = 3.0 V 4
LOW-level output voltage VOL 0.3 V Tamb -40 °C to +125 °C; IO = 100 μA; VCC = 1.65 V to 3.6 V 4
LOW-level output voltage VOL 0.65 V Tamb -40 °C to +125 °C; IO = 4 mA; VCC = 1.65 V 4
LOW-level output voltage VOL 0.8 V Tamb -40 °C to +125 °C; IO = 8 mA; VCC = 2.3 V 4
LOW-level output voltage VOL 0.6 V Tamb -40 °C to +125 °C; IO = 12 mA; VCC = 2.7 V 4
Input leakage current II -20 20 μA Tamb -40 °C to +125 °C; VCC = 3.6 V; VI = 5.5 V or GND 4
Supply current ICC 0.1 40 μA Tamb -40 °C to +125 °C; VCC = 3.6 V; VI = VCC or GND; IO = 0 A 4
Additional supply current ΔICC 5 5000 μA Tamb -40 °C to +125 °C; per input pin; VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A 5
nAn to Yn propagation delay tpd 0.5 4.7 11.3 ns Tamb -40 °C to +125 °C; VCC = 1.65 V to 1.95 V; see Fig. 4 5
nAn to Yn propagation delay tpd 1 2.8 6.5 ns Tamb -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; see Fig. 4 5
nAn to Yn propagation delay tpd 1 3 8 ns Tamb -40 °C to +125 °C; VCC = 2.7 V; see Fig. 4 5
nAn to Yn propagation delay tpd 1 2.5 7 ns Tamb -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; see Fig. 4 5
nE to Yn propagation delay tpd 1.5 4.5 10.7 ns Tamb -40 °C to +125 °C; VCC = 1.65 V to 1.95 V; see Fig. 5 5
nE to Yn propagation delay tpd 2.1 2.7 6.1 ns Tamb -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; see Fig. 5 5
nE to Yn propagation delay tpd 1 2.8 7 ns Tamb -40 °C to +125 °C; VCC = 2.7 V; see Fig. 5 5
nE to Yn propagation delay tpd 1 2.4 6.5 ns Tamb -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; see Fig. 5 5
Output skew time tsk(o) 1.5 ns Tamb -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; between any two outputs of same package 5
nAn to Yn propagation delay tpd 14 ns VCC = 1.2 V; see Fig. 4; typical only 5
Input capacitance CI 5 pF VCC = 0 V to 3.6 V; VI = GND to VCC 4
Power dissipation capacitance CPD 5.6 pF VCC = 1.65 V to 1.95 V; VI = GND to VCC 5
Power dissipation capacitance CPD 11.3 pF VCC = 2.3 V to 2.7 V; VI = GND to VCC 5
Power dissipation capacitance CPD 16.4 pF VCC = 3.0 V to 3.6 V; VI = GND to VCC 5

CAD (KiCad official)

  • Symbol: 74LVC139PW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74lvc139pw-etched.step / 74lvc139pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc139pw.step / 74lvc139pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 0724ea5fe6c2fc18, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF