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74LVC125AS14-13
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Diodes Incorporated Buffer/Driver/Transceiver, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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74LVC125AS14-13
Diodes Incorporated · Buffer/Driver/Transceiver · SOP-14
74LVC125AS14-13 from Diodes Incorporated, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Data enable input for buffer 1 (active low). When low, buffer 1 output 1Y follows input 1A; when high, 1Y is in high-impedance. Input voltage range 0-5.5 V. |
| 2 | 1A | input | Data input for buffer 1. CMOS logic input, 5.5 V tolerant, VIH >= 0.65VCC, VIL <= 0.35VCC. |
| 3 | 1Y | tri_state | Data output for buffer 1. 3-state CMOS output capable of sinking 24 mA at VCC = 3.3 V; enabled when 1OE is low. |
| 4 | 2OE | input | Data enable input for buffer 2 (active low). When low, buffer 2 output 2Y follows input 2A; when high, 2Y is high-impedance. |
| 5 | 2A | input | Data input for buffer 2. CMOS logic input, 5.5 V tolerant. |
| 6 | 2Y | tri_state | Data output for buffer 2. 3-state CMOS output; enabled when 2OE is low. |
| 7 | GND | power_in | Ground reference. 0 V return for the device. |
| 8 | 3Y | tri_state | Data output for buffer 3. 3-state CMOS output; enabled when 3OE is low. |
| 9 | 3A | input | Data input for buffer 3. CMOS logic input, 5.5 V tolerant. |
| 10 | 3OE | input | Data enable input for buffer 3 (active low). When low, buffer 3 output 3Y follows input 3A; when high, 3Y is high-impedance. |
| 11 | 4Y | tri_state | Data output for buffer 4. 3-state CMOS output; enabled when 4OE is low. |
| 12 | 4A | input | Data input for buffer 4. CMOS logic input, 5.5 V tolerant. |
| 13 | 4OE | input | Data enable input for buffer 4 (active low). When low, buffer 4 output 4Y follows input 4A; when high, 4Y is high-impedance. |
| 14 | VCC | power_in | Positive supply voltage, 1.65 V to 5.5 V operating range (absolute max 6.5 V). Typical supply current ICC = 10 uA at VCC = 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
74LVC125AS14-1374LVC125AS14-13T14-13
CAD (KiCad official)
- Symbol:
74LVC125AS14-13 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74lvc125as14-13-etched.step/74lvc125as14-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc125as14-13.step/74lvc125as14-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (10 pp, sha256
9276dbd963ebe928, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LVC125AS14-13
**Diodes Incorporated** · Buffer/Driver/Transceiver · SOP-14
74LVC125AS14-13 from Diodes Incorporated, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Data enable input for buffer 1 (active low). When low, buffer 1 output 1Y follows input 1A; when high, 1Y is in high-impedance. Input voltage range 0-5.5 V. |
| 2 | 1A | input | Data input for buffer 1. CMOS logic input, 5.5 V tolerant, VIH >= 0.65*VCC, VIL <= 0.35*VCC. |
| 3 | 1Y | tri_state | Data output for buffer 1. 3-state CMOS output capable of sinking 24 mA at VCC = 3.3 V; enabled when 1OE is low. |
| 4 | 2OE | input | Data enable input for buffer 2 (active low). When low, buffer 2 output 2Y follows input 2A; when high, 2Y is high-impedance. |
| 5 | 2A | input | Data input for buffer 2. CMOS logic input, 5.5 V tolerant. |
| 6 | 2Y | tri_state | Data output for buffer 2. 3-state CMOS output; enabled when 2OE is low. |
| 7 | GND | power_in | Ground reference. 0 V return for the device. |
| 8 | 3Y | tri_state | Data output for buffer 3. 3-state CMOS output; enabled when 3OE is low. |
| 9 | 3A | input | Data input for buffer 3. CMOS logic input, 5.5 V tolerant. |
| 10 | 3OE | input | Data enable input for buffer 3 (active low). When low, buffer 3 output 3Y follows input 3A; when high, 3Y is high-impedance. |
| 11 | 4Y | tri_state | Data output for buffer 4. 3-state CMOS output; enabled when 4OE is low. |
| 12 | 4A | input | Data input for buffer 4. CMOS logic input, 5.5 V tolerant. |
| 13 | 4OE | input | Data enable input for buffer 4 (active low). When low, buffer 4 output 4Y follows input 4A; when high, 4Y is high-impedance. |
| 14 | VCC | power_in | Positive supply voltage, 1.65 V to 5.5 V operating range (absolute max 6.5 V). Typical supply current ICC = 10 uA at VCC = 3.6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
## Ordering variants
- `74LVC125AS14-13`
- `74LVC125AS14-13T14-13`
## CAD (KiCad official)
- Symbol: `74LVC125AS14-13`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `74lvc125as14-13-etched.step` / `74lvc125as14-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc125as14-13.step` / `74lvc125as14-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](docs/74lvc125as14-13-datasheet.pdf) (10 pp, sha256 `9276dbd963ebe928`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lvc125as14-13-datasheet.pdf)