74lvc125ad: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body…
74lvc125ad: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
74lvc125ad: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
74lvc125ad: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
74lvc125ad: laser-etched CAD + chip hero (factory 2.0.0 backfill)
74lvc125ad: stamp component.logic (74LVC125) from component-ocean
74lvc125ad: factory component page (tier=mfr)
Initial commit: component/74lvc125ad