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74LVC125AD

Public Made by Adom

by adom

Nexperia Buffer/Driver/Transceiver, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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74LVC125AD

Nexperia · Buffer/Driver/Transceiver · SOIC-14

74LVC125AD from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Data enable input for buffer 1 (active LOW). A LOW enables output 1Y; a HIGH puts 1Y into the high-impedance 3-state.
2 1A input Data input for buffer 1. 5 V tolerant Schmitt-trigger CMOS/TTL input; drives 1Y when enabled by 1OE.
3 1Y tri_state Data output for buffer 1. 3-state CMOS output; drive strength up to -24 mA / +24 mA at VCC = 3.0 V.
4 2OE input Data enable input for buffer 2 (active LOW). A LOW enables output 2Y; a HIGH puts 2Y into the high-impedance 3-state.
5 2A input Data input for buffer 2. 5 V tolerant Schmitt-trigger CMOS/TTL input; drives 2Y when enabled by 2OE.
6 2Y tri_state Data output for buffer 2. 3-state CMOS output; drive strength up to -24 mA / +24 mA at VCC = 3.0 V.
7 GND power_in Ground reference (0 V) for the device.
8 3Y tri_state Data output for buffer 3. 3-state CMOS output; drive strength up to -24 mA / +24 mA at VCC = 3.0 V.
9 3A input Data input for buffer 3. 5 V tolerant Schmitt-trigger CMOS/TTL input; drives 3Y when enabled by 3OE.
10 3OE input Data enable input for buffer 3 (active LOW). A LOW enables output 3Y; a HIGH puts 3Y into the high-impedance 3-state.
11 4Y tri_state Data output for buffer 4. 3-state CMOS output; drive strength up to -24 mA / +24 mA at VCC = 3.0 V.
12 4A input Data input for buffer 4. 5 V tolerant Schmitt-trigger CMOS/TTL input; drives 4Y when enabled by 4OE.
13 4OE input Data enable input for buffer 4 (active LOW). A LOW enables output 4Y; a HIGH puts 4Y into the high-impedance 3-state.
14 VCC power_in Supply voltage. Recommended operating range 1.65 V to 3.6 V (functional down to 1.2 V); absolute max 6.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • 74LVC125ADD
  • 74LVC125ADPW
  • 74LVC125ADBQ

CAD (KiCad official)

  • Symbol: 74LVC125AD
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: 74lvc125ad-etched.step / 74lvc125ad-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc125ad.step / 74lvc125ad.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 6c06513c299d865b, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF