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74LVC125ABQ

Nexperia · Buffers, Drivers, Receivers, Transceivers · DHVQFN-14-EP(2.5x3)

74LVC125ABQ from Nexperia, in a DHVQFN-14-EP(2.5x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-LOW data enable input for gate 1; a HIGH level places output 1Y in the high-impedance OFF-state.
2 1A input Data input for buffer 1; tolerant of 5.5 V overvoltage and can be driven from 3.3 V or 5 V devices.
3 1Y tri_state 3-state data output of buffer 1, high-impedance when 1OE is HIGH; output tolerates up to 5.5 V in the 3-state condition.
4 2OE input Active-LOW data enable input for gate 2; a HIGH level places output 2Y in the high-impedance OFF-state.
5 2A input Data input for buffer 2; tolerant of 5.5 V overvoltage and can be driven from 3.3 V or 5 V devices.
6 2Y tri_state 3-state data output of buffer 2, high-impedance when 2OE is HIGH; output tolerates up to 5.5 V in the 3-state condition.
7 GND power_in Ground (0 V) reference for all voltages on the device.
8 3Y tri_state 3-state data output of buffer 3, high-impedance when 3OE is HIGH; output tolerates up to 5.5 V in the 3-state condition.
9 3A input Data input for buffer 3; tolerant of 5.5 V overvoltage and can be driven from 3.3 V or 5 V devices.
10 3OE input Active-LOW data enable input for gate 3; a HIGH level places output 3Y in the high-impedance OFF-state.
11 4Y tri_state 3-state data output of buffer 4, high-impedance when 4OE is HIGH; output tolerates up to 5.5 V in the 3-state condition.
12 4A input Data input for buffer 4; tolerant of 5.5 V overvoltage and can be driven from 3.3 V or 5 V devices.
13 4OE input Active-LOW data enable input for gate 4; a HIGH level places output 4Y in the high-impedance OFF-state.
14 VCC power_in Supply voltage; recommended operating range 1.65 V to 3.6 V (functional down to 1.2 V), absolute maximum 6.5 V.
15 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-14-EP(2.5x3)
Category Logic
Pins 15

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 6.5 V 3
input clamping current IIK -50 mA VI < 0 V 3
input voltage VI -0.5 6.5 V 3
output clamping current IOK -50 50 mA VO > VCC or VO < 0 V 3
output voltage VO -0.5 V output HIGH or LOW-state 3
output voltage VO -0.5 6.5 V output 3-state 3
output current IO -50 50 mA VO = 0 V to VCC 3
supply current ICC 100 mA 3
ground current IGND -100 mA 3
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 3
storage temperature Tstg -65 150 °C 3
supply voltage VCC 1.65 3.6 V 3
supply voltage (functional) VCC 1.2 V functional 3
input voltage VI 0 5.5 V 3
output voltage VO 0 V output HIGH or LOW state 3
output voltage VO 0 5.5 V output 3-state 3
ambient temperature Tamb -40 125 °C 3
input transition rise and fall rate Δt/ΔV 0 20 ns/V VCC = 2.3 V to 2.7 V 3
input transition rise and fall rate Δt/ΔV 0 10 ns/V VCC = 2.7 V to 3.6 V 3
HIGH-level input voltage VIH 1.08 V VCC = 1.2 V 4
HIGH-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 4
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V 4
LOW-level input voltage VIL 0.12 V VCC = 1.2 V 4
LOW-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 4
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V 4
HIGH-level output voltage VOH 1.05 V VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V 4
HIGH-level output voltage VOH 1.65 V VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V 4
HIGH-level output voltage VOH 2.05 V VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V 4
HIGH-level output voltage VOH 2.25 V VI = VIH or VIL; IO = -18 mA; VCC = 3.0 V 4
HIGH-level output voltage VOH 2 V VI = VIH or VIL; IO = -24 mA; VCC = 3.0 V 4
LOW-level output voltage VOL 0.3 V VI = VIH or VIL; IO = 100 μA; VCC = 1.65 V to 3.6 V 4
LOW-level output voltage VOL 0.65 V VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V 4
LOW-level output voltage VOL 0.8 V VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V 4
LOW-level output voltage VOL 0.6 V VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V 4
input leakage current II -20 0.1 20 μA VCC = 3.6 V; VI = 5.5 V or GND 4
OFF-state output current IOZ -20 0.1 20 μA VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND 4
power-off leakage current IOFF -20 0.1 20 μA VCC = 0.0 V; VI or VO = 5.5 V 4
supply current ICC 0.1 40 μA VCC = 3.6 V; VI = VCC or GND; IO = 0 A 4
additional supply current ΔICC 5 5000 μA per input pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 2.7 V to 3.6 V 4
propagation delay nA to nY tpd 1.5 5.4 12.8 ns nA to nY; see Fig. 6; VCC = 1.65 V to 1.95 V 5
propagation delay nA to nY tpd 1 2.9 6.7 ns nA to nY; see Fig. 6; VCC = 2.3 V to 2.7 V 5
propagation delay nA to nY tpd 1.5 2.8 7 ns nA to nY; see Fig. 6; VCC = 2.7 V 5
propagation delay nA to nY tpd 1 2.5 6 ns nA to nY; see Fig. 6; VCC = 3.0 V to 3.6 V 5
enable time nOE to nY ten 1 5 14.2 ns nOE to nY; see Fig. 7; VCC = 1.65 V to 1.95 V 5
enable time nOE to nY ten 0.5 2.9 7.9 ns nOE to nY; see Fig. 7; VCC = 2.3 V to 2.7 V 5
enable time nOE to nY ten 1.5 3.1 8.5 ns nOE to nY; see Fig. 7; VCC = 2.7 V 5
enable time nOE to nY ten 1 2.3 7 ns nOE to nY; see Fig. 7; VCC = 3.0 V to 3.6 V 5
disable time nOE to nY tdis 2.2 4.6 8.7 ns nOE to nY; see Fig. 7; VCC = 1.65 V to 1.95 V 5
disable time nOE to nY tdis 0.5 2.6 5 ns nOE to nY; see Fig. 7; VCC = 2.3 V to 2.7 V 5
disable time nOE to nY tdis 1.5 3.1 6.5 ns nOE to nY; see Fig. 7; VCC = 2.7 V 5
disable time nOE to nY tdis 1 3.2 6 ns nOE to nY; see Fig. 7; VCC = 3.0 V to 3.6 V 5
output skew time tsk(o) 1.5 ns VCC = 3.0 V to 3.6 V 5

CAD (KiCad official)

  • Symbol: 74LVC125ABQ
  • Footprint: Package_DFN_QFN:DHVQFN-14-1EP_2.5x3mm_P0.5mm_EP1x1.5mm
  • 3D model: DHVQFN-14-EP(2.5x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: 74lvc125abq-etched.step / 74lvc125abq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc125abq.step / 74lvc125abq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 6c06513c299d865b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF