# 74LVC11PW

**Nexperia** · Gates · TSSOP-14

74LVC11PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of gate 1; inputs accept voltages up to 5.5 V. |
| 2 | 1B | input | Data input B of gate 1; inputs accept voltages up to 5.5 V. |
| 3 | 2A | input | Data input A of gate 2; inputs accept voltages up to 5.5 V. |
| 4 | 2B | input | Data input B of gate 2; inputs accept voltages up to 5.5 V. |
| 5 | 2C | input | Data input C of gate 2; inputs accept voltages up to 5.5 V. |
| 6 | 2Y | output | Data output of gate 2, HIGH only when 2A, 2B and 2C are all HIGH. |
| 7 | GND | power_in | Ground (0 V). |
| 8 | 3Y | output | Data output of gate 3, HIGH only when 3A, 3B and 3C are all HIGH. |
| 9 | 3A | input | Data input A of gate 3; inputs accept voltages up to 5.5 V. |
| 10 | 3B | input | Data input B of gate 3; inputs accept voltages up to 5.5 V. |
| 11 | 3C | input | Data input C of gate 3; inputs accept voltages up to 5.5 V. |
| 12 | 1Y | output | Data output of gate 1, HIGH only when 1A, 1B and 1C are all HIGH. |
| 13 | 1C | input | Data input C of gate 1; inputs accept voltages up to 5.5 V. |
| 14 | VCC | power_in | Supply voltage, recommended 1.65 V to 3.6 V (functional down to 1.2 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 |  | 6.5 | V |  | 3 |
| Input clamping current | IIK | -50 |  |  | mA | VI < 0 V | 3 |
| Input voltage | VI | -0.5 |  | 6.5 | V | note 1 | 3 |
| Output clamping current | IOK |  |  | 50 | mA | VO > VCC or VO < 0 V; printed ±50 | 3 |
| Output voltage | VO | -0.5 |  |  | V | note 2; max printed as VCC + 0.5 | 3 |
| Output current | IO |  |  | 50 | mA | VO = 0 V to VCC; printed ±50 | 3 |
| Supply current | ICC |  |  | 100 | mA |  | 3 |
| Ground current | IGND | -100 |  |  | mA |  | 3 |
| Total power dissipation | Ptot |  |  | 500 | mW | Tamb = -40 °C to +125 °C; TSSOP14 derates 7.3 mW/K above 81 °C | 3 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 3 |
| Supply voltage | VCC | 1.65 |  | 3.6 | V |  | 4 |
| Supply voltage (functional) | VCC | 1.2 |  |  | V | functional | 4 |
| Input voltage | VI | 0 |  | 5.5 | V |  | 4 |
| Output voltage | VO | 0 |  |  | V | max printed as VCC | 4 |
| Ambient temperature | Tamb | -40 |  | 125 | °C |  | 4 |
| Input transition rise and fall rate | Δt/ΔV | 0 |  | 20 | ns/V | VCC = 1.65 V to 2.7 V | 4 |
| Input transition rise and fall rate | Δt/ΔV | 0 |  | 10 | ns/V | VCC = 2.7 V to 3.6 V | 4 |
| HIGH-level input voltage | VIH | 1.08 |  |  | V | VCC = 1.2 V; -40 °C to +85 °C | 4 |
| HIGH-level input voltage | VIH | 1.7 |  |  | V | VCC = 2.3 V to 2.7 V; -40 °C to +85 °C | 4 |
| HIGH-level input voltage | VIH | 2 |  |  | V | VCC = 2.7 V to 3.6 V; -40 °C to +85 °C | 4 |
| LOW-level input voltage | VIL |  |  | 0.12 | V | VCC = 1.2 V; -40 °C to +85 °C | 4 |
| LOW-level input voltage | VIL |  |  | 0.7 | V | VCC = 2.3 V to 2.7 V; -40 °C to +85 °C | 4 |
| LOW-level input voltage | VIL |  |  | 0.8 | V | VCC = 2.7 V to 3.6 V; -40 °C to +85 °C | 4 |
| HIGH-level output voltage | VOH | 1.2 |  |  | V | VI = VIH or VIL; IO = -4 mA; VCC = 1.65 V; -40 °C to +85 °C | 4 |
| HIGH-level output voltage | VOH | 1.8 |  |  | V | VI = VIH or VIL; IO = -8 mA; VCC = 2.3 V; -40 °C to +85 °C | 4 |
| HIGH-level output voltage | VOH | 2.2 |  |  | V | VI = VIH or VIL; IO = -12 mA; VCC = 2.7 V; -40 °C to +85 °C | 4 |
| HIGH-level output voltage | VOH | 2.4 |  |  | V | VI = VIH or VIL; IO = -18 mA; VCC = 3.0 V; -40 °C to +85 °C | 4 |
| LOW-level output voltage | VOL |  |  | 0.2 | V | VI = VIH or VIL; IO = 100 µA; VCC = 1.65 V to 3.6 V; -40 °C to +85 °C | 4 |
| LOW-level output voltage | VOL |  |  | 0.45 | V | VI = VIH or VIL; IO = 4 mA; VCC = 1.65 V; -40 °C to +85 °C | 4 |
| LOW-level output voltage | VOL |  |  | 0.6 | V | VI = VIH or VIL; IO = 8 mA; VCC = 2.3 V; -40 °C to +85 °C | 4 |
| LOW-level output voltage | VOL |  |  | 0.4 | V | VI = VIH or VIL; IO = 12 mA; VCC = 2.7 V; -40 °C to +85 °C | 4 |
| LOW-level output voltage | VOL |  |  | 0.55 | V | VI = VIH or VIL; IO = 24 mA; VCC = 3.0 V; -40 °C to +85 °C | 4 |
| Input leakage current | II | -5 | 0.1 | 5 | μA | VCC = 3.6 V; VI = 5.5 V or GND; -40 °C to +85 °C; printed ± | 4 |
| Input leakage current | II | -20 |  | 20 | μA | VCC = 3.6 V; VI = 5.5 V or GND; -40 °C to +125 °C; printed ± | 4 |
| Supply current | ICC |  | 0.1 | 10 | μA | VCC = 3.6 V; VI = VCC or GND; IO = 0 A; -40 °C to +85 °C | 4 |
| Supply current | ICC |  |  | 40 | μA | VCC = 3.6 V; VI = VCC or GND; IO = 0 A; -40 °C to +125 °C | 4 |
| Additional supply current | ΔICC |  | 5 | 500 | μA | per input pin; VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A; -40 °C to +85 °C | 4 |
| Additional supply current | ΔICC |  |  | 5000 | μA | per input pin; VCC = 2.7 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A; -40 °C to +125 °C | 4 |
| Input capacitance | CI |  | 5 |  | pF | VCC = 0 V to 3.6 V; VI = GND to VCC | 5 |
| Propagation delay nA, nB, nC to nY | tpd |  | 14 |  | ns | VCC = 1.2 V; -40 °C to +85 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1 | 4.7 | 12.2 | ns | VCC = 1.65 V to 1.95 V; -40 °C to +85 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1.5 | 2.8 | 6.9 | ns | VCC = 2.3 V to 2.7 V; -40 °C to +85 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1.5 | 2.9 | 7 | ns | VCC = 2.7 V; -40 °C to +85 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1.5 | 2.5 | 6.2 | ns | VCC = 3.0 V to 3.6 V; -40 °C to +85 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1 |  | 14.1 | ns | VCC = 1.65 V to 1.95 V; -40 °C to +125 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1.5 |  | 8 | ns | VCC = 2.3 V to 2.7 V; -40 °C to +125 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1.5 |  | 8.1 | ns | VCC = 2.7 V; -40 °C to +125 °C | 5 |
| Propagation delay nA, nB, nC to nY | tpd | 1.5 |  | 7.2 | ns | VCC = 3.0 V to 3.6 V; -40 °C to +125 °C | 5 |
| Power dissipation capacitance | CPD |  | 3.1 |  | pF | per gate; VI = GND to VCC; VCC = 1.65 V to 1.95 V | 5 |
| Power dissipation capacitance | CPD |  | 6.2 |  | pF | per gate; VI = GND to VCC; VCC = 2.3 V to 2.7 V | 5 |
| Power dissipation capacitance | CPD |  | 9 |  | pF | per gate; VI = GND to VCC; VCC = 3.0 V to 3.6 V | 5 |

## CAD (KiCad official)

- Symbol: `74LVC11PW`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74lvc11pw-etched.step` / `74lvc11pw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lvc11pw.step` / `74lvc11pw.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74LVC11PW.pdf) (12 pp, sha256 `eb839579f60982a1`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74lvc11pw-datasheet.pdf)