component
74LVC07AD
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74LVC07AD
Nexperia · Buffers, Drivers, Receivers, Transceivers · SOIC-14
74LVC07AD from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of gate 1 with Schmitt-trigger action; overvoltage tolerant to 5.5 V with recommended input voltage 0 V to 5.5 V. |
| 2 | 1Y | output | Open-drain data output of gate 1; outputs 5 V tolerant with output voltage 0 V to 5.5 V in active mode, and goes high-impedance (Z) when the input is HIGH. |
| 3 | 2A | input | Data input of gate 2 with Schmitt-trigger action; overvoltage tolerant to 5.5 V with recommended input voltage 0 V to 5.5 V. |
| 4 | 2Y | output | Open-drain data output of gate 2; outputs 5 V tolerant with output voltage 0 V to 5.5 V in active mode, and goes high-impedance (Z) when the input is HIGH. |
| 5 | 3A | input | Data input of gate 3 with Schmitt-trigger action; overvoltage tolerant to 5.5 V with recommended input voltage 0 V to 5.5 V. |
| 6 | 3Y | output | Open-drain data output of gate 3; outputs 5 V tolerant with output voltage 0 V to 5.5 V in active mode, and goes high-impedance (Z) when the input is HIGH. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages; this is the device ground pin. |
| 8 | 4Y | output | Open-drain data output of gate 4; outputs 5 V tolerant with output voltage 0 V to 5.5 V in active mode, and goes high-impedance (Z) when the input is HIGH. |
| 9 | 4A | input | Data input of gate 4 with Schmitt-trigger action; overvoltage tolerant to 5.5 V with recommended input voltage 0 V to 5.5 V. |
| 10 | 5Y | output | Open-drain data output of gate 5; outputs 5 V tolerant with output voltage 0 V to 5.5 V in active mode, and goes high-impedance (Z) when the input is HIGH. |
| 11 | 5A | input | Data input of gate 5 with Schmitt-trigger action; overvoltage tolerant to 5.5 V with recommended input voltage 0 V to 5.5 V. |
| 12 | 6Y | output | Open-drain data output of gate 6; outputs 5 V tolerant with output voltage 0 V to 5.5 V in active mode, and goes high-impedance (Z) when the input is HIGH. |
| 13 | 6A | input | Data input of gate 6 with Schmitt-trigger action; overvoltage tolerant to 5.5 V with recommended input voltage 0 V to 5.5 V. |
| 14 | VCC | power_in | Supply voltage; recommended range 1.65 V to 5.5 V, functional down to 1.2 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
74LVC07AD - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
74lvc07ad-etched.step/74lvc07ad-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lvc07ad.step/74lvc07ad.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (12 pp, sha256
7e54baea5ee5b2c4, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).