74LV4094PW

{
  "slug": "74lv4094pw",
  "version": "0.1.0",
  "type": "component",
  "description": "Nexperia Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "74lv4094pw",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74lv4094pw.kicad_sym",
    "74lv4094pw.kicad_mod",
    "74lv4094pw.glb",
    "74lv4094pw.step",
    "74lv4094pw.lbr",
    "docs/hero.png",
    "docs/74lv4094pw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "74lv4094pw-hero.glb",
    "74lv4094pw-hero.overlay.json",
    "74lv4094pw-etched.glb"
  ],
  "component": {
    "mpn": "74LV4094PW",
    "manufacturer": "Nexperia",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74LV4094PW.pdf",
    "parts": {
      "symbol": "74lv4094pw.kicad_sym",
      "footprint": "74lv4094pw.kicad_mod",
      "model_3d": "74lv4094pw-hero.glb",
      "model_3d_plain": "74lv4094pw-etched.glb",
      "model_3d_step": "74lv4094pw-etched.step",
      "model_3d_step_plain": "74lv4094pw.step",
      "lbr": "74lv4094pw.lbr"
    },
    "distributor_links": {
      "lcsc": "C548016",
      "mouser": "771-74LV4094PW"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T04:46:18Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": "771-74LV4094PW",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "STR",
        "type": "input",
        "description": "Strobe input; data is transferred from the shift register to the storage register when STR is HIGH."
      },
      {
        "number": "2",
        "name": "D",
        "type": "input",
        "description": "Serial data input to the 8-stage shift register; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC."
      },
      {
        "number": "3",
        "name": "CP",
        "type": "input",
        "description": "Clock input; data is shifted into the shift register on LOW-to-HIGH transitions of CP."
      },
      {
        "number": "4",
        "name": "QP0",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 0; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "5",
        "name": "QP1",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 1; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "6",
        "name": "QP2",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 2; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "7",
        "name": "QP3",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 3; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground supply voltage; 0 V reference for all voltages."
      },
      {
        "number": "9",
        "name": "QS1",
        "type": "output",
        "description": "Serial output; data is available on LOW-to-HIGH transitions of CP to allow cascading when clock edges are fast."
      },
      {
        "number": "10",
        "name": "QS2",
        "type": "output",
        "description": "Serial output; the same data appears on the next HIGH-to-LOW transition of CP to allow cascading when clock edges are slow."
      },
      {
        "number": "11",
        "name": "QP7",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 7; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "12",
        "name": "QP6",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 6; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "13",
        "name": "QP5",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 5; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "14",
        "name": "QP4",
        "type": "tri_state",
        "description": "Parallel 3-state output from storage register stage 4; enters high-impedance OFF-state when OE is LOW."
      },
      {
        "number": "15",
        "name": "OE",
        "type": "input",
        "description": "Output enable input; parallel outputs are active when HIGH and go to high-impedance OFF-state when LOW, without changing the register states."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage; recommended operating range is 1.0 V to 3.6 V, with an absolute maximum of +7 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pinout taken from the PW (TSSOP16, SOT403-1) pinning diagram on page 3, cross-checked against the pi; QP0 to QP7 typed as tri_state because the datasheet describes 3-state outputs and a high-impedance O"
        ],
        "pages_sent": 16,
        "cost_usd": 0.0737,
        "at": "2026-10-18T04:42:01"
      },
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/74LV4094PW.pdf",
        "pages": 16,
        "sha256": "4b6bf378275a9969",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "74lv4094pw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74lv4094pw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f1414e40d8be7e96aea0abfa2914dfecb7b6e6121a68b7323450af2083ad44a3",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}