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Contents

README

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74LV4052D

Nexperia · Analog Switches, Multiplexers · SO-16

74LV4052D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 2Y0 bidirectional Independent input or output of switch 2 that connects to 2Z when E is LOW and S1 = S0 = LOW; voltages at nYn may not exceed VCC or VEE.
2 2Y2 bidirectional Independent input or output of switch 2 that connects to 2Z when E is LOW, S1 is HIGH and S0 is LOW; voltages at nYn may not exceed VCC or VEE.
3 2Z bidirectional Common input or output of switch 2 that connects to the selected 2Yn channel when E is LOW; voltages at nZ may not exceed VCC or VEE.
4 2Y3 bidirectional Independent input or output of switch 2 that connects to 2Z when E is LOW, S1 is HIGH and S0 is HIGH; voltages at nYn may not exceed VCC or VEE.
5 2Y1 bidirectional Independent input or output of switch 2 that connects to 2Z when E is LOW, S1 is LOW and S0 is HIGH; voltages at nYn may not exceed VCC or VEE.
6 E input Digital enable input common to both switches, active LOW; when HIGH, all switches are turned off.
7 VEE power_in Negative supply voltage; voltages at nYn and nZ may not exceed VCC or VEE.
8 GND power_in Ground pin (0 V), the reference for the datasheet's voltage ratings.
9 S1 input Digital select input common to both switches; together with S0 it selects the channel when E is LOW (S1 is the most significant bit).
10 S0 input Digital select input common to both switches; together with S1 it selects the channel when E is LOW (S0 is the least significant bit).
11 1Y3 bidirectional Independent input or output of switch 1 that connects to 1Z when E is LOW, S1 is HIGH and S0 is HIGH; voltages at nYn may not exceed VCC or VEE.
12 1Y0 bidirectional Independent input or output of switch 1 that connects to 1Z when E is LOW and S1 = S0 = LOW; voltages at nYn may not exceed VCC or VEE.
13 1Z bidirectional Common input or output of switch 1 that connects to the selected 1Yn channel when E is LOW; voltages at nZ may not exceed VCC or VEE.
14 1Y1 bidirectional Independent input or output of switch 1 that connects to 1Z when E is LOW, S1 is LOW and S0 is HIGH; voltages at nYn may not exceed VCC or VEE.
15 1Y2 bidirectional Independent input or output of switch 1 that connects to 1Z when E is LOW, S1 is HIGH and S0 is LOW; voltages at nYn may not exceed VCC or VEE.
16 VCC power_in Positive supply voltage; recommended operating range is 1.0 V to 6.0 V, with an absolute maximum rating of -0.5 V to +7.0 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SO-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC 1 3.3 6 V see Fig. 5 4
ambient temperature Tamb -40 125 °C in free air 4
input transition rise and fall rate Δt/ΔV 500 ns/V VCC = 1.0 V to 2.0 V 4
input transition rise and fall rate Δt/ΔV 200 ns/V VCC = 2.0 V to 2.7 V 4
input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 2.7 V to 6.0 V 4
supply voltage VCC -0.5 7 V 4
input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
switch clamping current ISK -20 20 mA VSW < -0.5 V or VSW > VCC + 0.5 V 4
switch current ISW -25 25 mA VSW > -0.5 V or VSW < VCC + 0.5 V; source or sink current 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
HIGH-level input voltage VIH 0.9 V VCC = 1.2 V; -40 °C to +125 °C 5
HIGH-level input voltage VIH 1.4 V VCC = 2.0 V; -40 °C to +125 °C 5
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V; -40 °C to +125 °C 5
HIGH-level input voltage VIH 3.15 V VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level input voltage VIH 4.2 V VCC = 6.0 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 0.3 V VCC = 1.2 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 0.6 V VCC = 2.0 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 1.35 V VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 1.8 V VCC = 6.0 V; -40 °C to +125 °C 5
input leakage current II 1 μA VCC = 3.6 V; VI = VCC or GND; -40 °C to +125 °C 5
input leakage current II 2 μA VCC = 6.0 V; VI = VCC or GND; -40 °C to +125 °C 5
OFF-state leakage current IS(OFF) 1 μA VCC = 3.6 V; VI = VIH or VIL; see Fig. 6; -40 °C to +125 °C 5
OFF-state leakage current IS(OFF) 2 μA VCC = 6.0 V; VI = VIH or VIL; see Fig. 6; -40 °C to +125 °C 5
ON-state leakage current IS(ON) 1 μA VCC = 3.6 V; VI = VIH or VIL; see Fig. 7; -40 °C to +125 °C 5
ON-state leakage current IS(ON) 2 μA VCC = 6.0 V; VI = VIH or VIL; see Fig. 7; -40 °C to +125 °C 5
supply current ICC 40 μA VCC = 3.6 V; VI = VCC or GND; IO = 0 A; -40 °C to +125 °C 5
supply current ICC 80 μA VCC = 6.0 V; VI = VCC or GND; IO = 0 A; -40 °C to +125 °C 5
additional supply current ΔICC 850 μA per input; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V; -40 °C to +125 °C 5
ON resistance (peak) RON(peak) 145 375 Ω VI = 0 V to VCC - VEE; VCC = 2.0 V; ISW = 1000 μA; -40 °C to +125 °C 6
ON resistance (peak) RON(peak) 90 235 Ω VI = 0 V to VCC - VEE; VCC = 2.7 V; ISW = 1000 μA; -40 °C to +125 °C 6
ON resistance (peak) RON(peak) 80 210 Ω VI = 0 V to VCC - VEE; VCC = 3.0 V to 3.6 V; ISW = 1000 μA; -40 °C to +125 °C 6
ON resistance (peak) RON(peak) 60 160 Ω VI = 0 V to VCC - VEE; VCC = 4.5 V; ISW = 1000 μA; -40 °C to +125 °C 6
ON resistance (peak) RON(peak) 55 145 Ω VI = 0 V to VCC - VEE; VCC = 6.0 V; ISW = 1000 μA; -40 °C to +125 °C 6
ON resistance (rail) RON(rail) 110 270 Ω VI = GND; VCC = 2.0 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 70 165 Ω VI = GND; VCC = 2.7 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 60 150 Ω VI = GND; VCC = 3.0 V to 3.6 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 45 115 Ω VI = GND; VCC = 4.5 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 40 100 Ω VI = GND; VCC = 6.0 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 120 370 Ω VI = VCC - VEE; VCC = 2.0 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 75 225 Ω VI = VCC - VEE; VCC = 2.7 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 70 205 Ω VI = VCC - VEE; VCC = 3.0 V to 3.6 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 50 150 Ω VI = VCC - VEE; VCC = 4.5 V; ISW = 1000 μA; -40 °C to +125 °C 7
ON resistance (rail) RON(rail) 45 135 Ω VI = VCC - VEE; VCC = 6.0 V; ISW = 1000 μA; -40 °C to +125 °C 7
propagation delay tpd 9 20 ns nYn to nZ, nZ to nYn; VCC = 2.0 V; see Fig. 10; -40 °C to +125 °C 8
propagation delay tpd 6 15 ns nYn to nZ, nZ to nYn; VCC = 2.7 V; see Fig. 10; -40 °C to +125 °C 8
propagation delay tpd 5 12 ns nYn to nZ, nZ to nYn; VCC = 3.0 V to 3.6 V; see Fig. 10; -40 °C to +125 °C 8
propagation delay tpd 4 10 ns nYn to nZ, nZ to nYn; VCC = 4.5 V; see Fig. 10; -40 °C to +125 °C 8
propagation delay tpd 3 8 ns nYn to nZ, nZ to nYn; VCC = 6.0 V; see Fig. 10; -40 °C to +125 °C 8
enable time ten 65 146 ns E, Sn to nYn, nZ; VCC = 2.0 V; see Fig. 11; -40 °C to +125 °C 8
enable time ten 48 108 ns E, Sn to nYn, nZ; VCC = 2.7 V; see Fig. 11; -40 °C to +125 °C 8
enable time ten 36 86 ns E, Sn to nYn, nZ; VCC = 3.0 V to 3.6 V; see Fig. 11; -40 °C to +125 °C 8
enable time ten 32 73 ns E, Sn to nYn, nZ; VCC = 4.5 V; see Fig. 11; -40 °C to +125 °C 8
enable time ten 25 56 ns E, Sn to nYn, nZ; VCC = 6.0 V; see Fig. 11; -40 °C to +125 °C 8
disable time tdis 43 95 ns E, Sn to nYn, nZ; VCC = 2.0 V; see Fig. 11; -40 °C to +125 °C 8
disable time tdis 33 71 ns E, Sn to nYn, nZ; VCC = 2.7 V; see Fig. 11; -40 °C to +125 °C 8
disable time tdis 26 57 ns E, Sn to nYn, nZ; VCC = 3.0 V to 3.6 V; see Fig. 11; -40 °C to +125 °C 8
disable time tdis 23 49 ns E, Sn to nYn, nZ; VCC = 4.5 V; see Fig. 11; -40 °C to +125 °C 8
disable time tdis 18 38 ns E, Sn to nYn, nZ; VCC = 6.0 V; see Fig. 11; -40 °C to +125 °C 8

CAD (KiCad official)

  • Symbol: 74LV4052D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: 74lv4052d-etched.step / 74lv4052d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lv4052d.step / 74lv4052d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (18 pp, sha256 dadae11c2492ccc7, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF