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74LV393PW

Public Made by Adom

by adom

Nexperia Counters / Dividers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74LV393PW

Nexperia · Counters / Dividers · TSSOP-14

74LV393PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CP input Clock input for counter 1; the counter advances on the HIGH-to-LOW transition of this edge-triggered input.
2 1MR input Asynchronous master reset input for counter 1, active HIGH, which clears the counter and forces its outputs LOW independent of nCP.
3 1Q0 output Flip-flop output bit 0 of counter 1.
4 1Q1 output Flip-flop output bit 1 of counter 1.
5 1Q2 output Flip-flop output bit 2 of counter 1.
6 1Q3 output Flip-flop output bit 3 of counter 1.
7 GND power_in Ground (0 V) reference for all voltages.
8 2Q3 output Flip-flop output bit 3 of counter 2.
9 2Q2 output Flip-flop output bit 2 of counter 2.
10 2Q1 output Flip-flop output bit 1 of counter 2.
11 2Q0 output Flip-flop output bit 0 of counter 2.
12 2MR input Asynchronous master reset input for counter 2, active HIGH, which clears the counter and forces its outputs LOW independent of nCP.
13 2CP input Clock input for counter 2; the counter advances on the HIGH-to-LOW transition of this edge-triggered input.
14 VCC power_in Supply voltage, with a recommended operating range of 1.0 V to 3.6 V and a limiting value of -0.5 V to +4.6 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 4.6 V 4
Input clamping current IIK 20 mA VI < -0.5 V or VI > VCC + 0.5 V (±20) 4
Output clamping current IOK 50 mA VO < -0.5 V or VO > VCC + 0.5 V (±50) 4
Output current IO 25 mA VO = -0.5 V to VCC + 0.5 V (±25) 4
Supply current ICC 50 mA 4
Ground current IGND -50 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C; TSSOP14 derates linearly 7.3 mW/K above 81 °C 4
Supply voltage VCC 1 3.3 3.6 V 5
Input voltage VI 0 V max = VCC 5
Output voltage VO 0 V max = VCC 5
Ambient temperature Tamb -40 125 °C 5
Input transition rise and fall rate Δt/ΔV 500 ns/V VCC = 1.0 V to 2.0 V 5
Input transition rise and fall rate Δt/ΔV 200 ns/V VCC = 2.0 V to 2.7 V 5
Input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 2.7 V to 3.6 V 5
HIGH-level input voltage VIH 0.9 V VCC = 1.2 V; -40 °C to +85 °C and -40 °C to +125 °C 5
HIGH-level input voltage VIH 1.4 V VCC = 2.0 V; -40 °C to +85 °C and -40 °C to +125 °C 5
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V; -40 °C to +85 °C and -40 °C to +125 °C 5
LOW-level input voltage VIL 0.3 V VCC = 1.2 V; -40 °C to +85 °C and -40 °C to +125 °C 5
LOW-level input voltage VIL 0.6 V VCC = 2.0 V; -40 °C to +85 °C and -40 °C to +125 °C 5
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V; -40 °C to +85 °C and -40 °C to +125 °C 5
HIGH-level output voltage VOH 1.8 2 V VI = VIH or VIL; IO = -100 μA; VCC = 2.0 V; -40 °C to +85 °C (125 °C min 1.8) 5
HIGH-level output voltage VOH 2.5 2.7 V VI = VIH or VIL; IO = -100 μA; VCC = 2.7 V; -40 °C to +85 °C (125 °C min 2.5) 5
HIGH-level output voltage VOH 2.8 3 V VI = VIH or VIL; IO = -100 μA; VCC = 3.0 V; -40 °C to +85 °C (125 °C min 2.8) 5
HIGH-level output voltage VOH 2.4 2.82 V VI = VIH or VIL; IO = -6 mA; VCC = 3.0 V; -40 °C to +85 °C (125 °C min 2.20) 5
LOW-level output voltage VOL 0 0.2 V VI = VIH or VIL; IO = 100 μA; VCC = 2.0 V; -40 °C to +85 °C (125 °C max 0.2) 5
LOW-level output voltage VOL 0.25 0.4 V VI = VIH or VIL; IO = 6 mA; VCC = 3.0 V; -40 °C to +85 °C (125 °C max 0.50) 5
Input leakage current II 1 μA VI = VCC or GND; VCC = 3.6 V; -40 °C to +85 °C and 125 °C 5
Supply current ICC 20 μA VI = VCC or GND; IO = 0 A; VCC = 3.6 V; -40 °C to +85 °C (125 °C max 160) 5
Additional supply current ΔICC 500 μA per input; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V; -40 °C to +85 °C (125 °C max 850) 5
Propagation delay nCP to nQ0 tpd 26 49 ns VCC = 2.0 V; -40 °C to +85 °C (125 °C max 60) 6
Propagation delay nCP to nQ0 tpd 19 36 ns VCC = 2.7 V; -40 °C to +85 °C (125 °C max 44) 6
Propagation delay nCP to nQ0 tpd 14 29 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C max 35) 6
Propagation delay nQ to nQn+1 tpd 9 17 ns VCC = 2.0 V; -40 °C to +85 °C (125 °C max 20) 6
Propagation delay nQ to nQn+1 tpd 6 13 ns VCC = 2.7 V; -40 °C to +85 °C (125 °C max 15) 6
Propagation delay nQ to nQn+1 tpd 5 10 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C max 12) 6
Propagation delay nMR to nQx tPHL 24 44 ns VCC = 2.0 V; -40 °C to +85 °C (125 °C max 54) 6
Propagation delay nMR to nQx tPHL 18 33 ns VCC = 2.7 V; -40 °C to +85 °C (125 °C max 40) 6
Propagation delay nMR to nQx tPHL 13 26 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C max 32) 6
Pulse width nCP HIGH or LOW tW 34 10 ns VCC = 2.0 V; -40 °C to +85 °C (125 °C min 41) 6
Pulse width nCP HIGH or LOW tW 25 8 ns VCC = 2.7 V; -40 °C to +85 °C (125 °C min 30) 6
Pulse width nCP HIGH or LOW tW 20 6 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C min 24) 6
Pulse width nMR HIGH tW 34 12 ns VCC = 2.0 V; -40 °C to +85 °C (125 °C min 41) 6
Pulse width nMR HIGH tW 25 9 ns VCC = 2.7 V; -40 °C to +85 °C (125 °C min 30) 6
Pulse width nMR HIGH tW 20 7 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C min 24) 6
Recovery time nMR to nCP trec 5 2 ns VCC = 2.0 V; -40 °C to +85 °C (125 °C min 5) 6
Recovery time nMR to nCP trec 5 1 ns VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C min 5) 6
Maximum frequency fmax 14 53 MHz VCC = 2.0 V; -40 °C to +85 °C (125 °C min 12) 6
Maximum frequency fmax 19 72 MHz VCC = 2.7 V; -40 °C to +85 °C (125 °C min 16) 6
Maximum frequency fmax 24 90 MHz VCC = 3.0 V to 3.6 V; -40 °C to +85 °C (125 °C min 20) 6
Input capacitance CI 3.5 pF 5
Power dissipation capacitance CPD 23 pF VI = GND to VCC 7

CAD (KiCad official)

  • Symbol: 74LV393PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74lv393pw-etched.step / 74lv393pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lv393pw.step / 74lv393pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 5a51886fa0d61843, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF