component
74LV244APWJ
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74LV244APWJ
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
74LV244APWJ from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for the 1Y0 to 1Y3 outputs, active LOW; a HIGH on this pin puts those outputs in the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 1A0; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 3 | 2Y0 | tri_state | Data output 2Y0 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 4 | 1A1 | input | Data input 1A1; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 5 | 2Y1 | tri_state | Data output 2Y1 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 6 | 1A2 | input | Data input 1A2; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 7 | 2Y2 | tri_state | Data output 2Y2 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 8 | 1A3 | input | Data input 1A3; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 9 | 2Y3 | tri_state | Data output 2Y3 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 10 | GND | power_in | Ground (0 V); all voltages are referenced to this pin. |
| 11 | 2A3 | input | Data input 2A3; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 12 | 1Y3 | tri_state | Data output 1Y3 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 13 | 2A2 | input | Data input 2A2; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 14 | 1Y2 | tri_state | Data output 1Y2 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 15 | 2A1 | input | Data input 2A1; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 16 | 1Y1 | tri_state | Data output 1Y1 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 17 | 2A0 | input | Data input 2A0; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 18 | 1Y0 | tri_state | Data output 1Y0 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 19 | 2OE | input | Output enable input for the 2Y0 to 2Y3 outputs, active LOW; a HIGH on this pin puts those outputs in the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage; the recommended operating range is 2.0 V to 5.5 V referenced to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| input voltage | VI | -0.5 | 7 | V | 3 | ||
| output voltage | VO | -0.5 | V | active mode | 3 | ||
| output voltage | VO | -0.5 | 7 | V | power-down or 3-state mode | 3 | |
| input clamping current | IIK | -20 | mA | VI < 0 V | 3 | ||
| output clamping current | IOK | -50 | mA | VO < 0 V | 3 | ||
| output current | IO | -35 | 35 | mA | VO = 0 V to VCC | 3 | |
| supply current | ICC | 70 | mA | 3 | |||
| ground current | IGND | -70 | mA | 3 | |||
| storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| supply voltage | VCC | 2 | 5.5 | V | 4 | ||
| input voltage | VI | 0 | 5.5 | V | 4 | ||
| output voltage | VO | 0 | V | active mode | 4 | ||
| output voltage | VO | 0 | 5.5 | V | power-down or 3-state mode | 4 | |
| ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 200 | ns/V | VCC = 2.3 V to 2.7 V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 100 | ns/V | VCC = 3.0 V to 3.6 V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 4.5 V to 5.5 V | 4 | ||
| HIGH-level input voltage | VIH | 1.5 | V | VCC = 2 V | 4 | ||
| LOW-level input voltage | VIL | 0.5 | V | VCC = 2 V | 4 | ||
| HIGH-level output voltage | VOH | 2 | V | VCC = 2.3 V; IO = -2 mA | 4 | ||
| HIGH-level output voltage | VOH | 2.48 | V | VCC = 3.0 V; IO = -8 mA | 4 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VCC = 4.5 V; IO = -16 mA | 4 | ||
| LOW-level output voltage | VOL | 0.1 | V | VCC = 2.0 V to 5.5 V; IO = 50 μA | 4 | ||
| LOW-level output voltage | VOL | 0.4 | V | VCC = 2.3 V; IO = 2 mA | 4 | ||
| LOW-level output voltage | VOL | 0.44 | V | VCC = 3.0 V; IO = 8 mA | 4 | ||
| LOW-level output voltage | VOL | 0.55 | V | VCC = 4.5 V; IO = 16 mA | 4 | ||
| OFF-state output current | IOZ | -2.5 | 2.5 | μA | VCC = 5.5 V; VI = VIH or VIL; VO = GND to 5.5 V | 4 | |
| power-off leakage current | IOFF | 5 | μA | VI or VO = GND to 5.5 V; VCC = 0 V | 4 | ||
| input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 0 V to 5.5 V | 5 | |
| supply current | ICC | 20 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 5 | ||
| propagation delay nAn to nYn | tpd | 1 | 15 | ns | nAn to nYn; see Fig. 3; VCC = 2.3 V to 2.7 V; CL = 15 pF | 5 | |
| propagation delay nAn to nYn | tpd | 1 | 18 | ns | nAn to nYn; see Fig. 3; VCC = 2.3 V to 2.7 V; CL = 50 pF | 5 | |
| propagation delay nAn to nYn | tpd | 1 | 10 | ns | nAn to nYn; see Fig. 3; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| propagation delay nAn to nYn | tpd | 1 | 13.5 | ns | nAn to nYn; see Fig. 3; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| propagation delay nAn to nYn | tpd | 1 | 6.5 | ns | nAn to nYn; see Fig. 3; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| propagation delay nAn to nYn | tpd | 1 | 8.5 | ns | nAn to nYn; see Fig. 3; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 | |
| enable time nOE to nYn | ten | 1 | 17 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 15 pF | 5 | |
| enable time nOE to nYn | ten | 1 | 21 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 50 pF | 5 | |
| enable time nOE to nYn | ten | 1 | 12.5 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| enable time nOE to nYn | ten | 1 | 16 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| enable time nOE to nYn | ten | 1 | 8.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| enable time nOE to nYn | ten | 1 | 10.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 | |
| disable time nOE to nYn | tdis | 1 | 16 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 15 pF | 5 | |
| disable time nOE to nYn | tdis | 1 | 21 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 50 pF | 5 | |
| disable time nOE to nYn | tdis | 1 | 13 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| disable time nOE to nYn | tdis | 1 | 18 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| disable time nOE to nYn | tdis | 1 | 13.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| disable time nOE to nYn | tdis | 1 | 15.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 | |
| skew | tsk(o) | 2 | ns | CL = 50 pF; VCC = 2.3 V to 2.7 V | 6 | ||
| skew | tsk(o) | 1.5 | ns | CL = 50 pF; VCC = 3.0 V to 3.6 V | 6 | ||
| skew | tsk(o) | 1 | ns | CL = 50 pF; VCC = 4.5 V to 5.5 V | 6 | ||
| input capacitance | CI | 6 | pF | VI = VCC or GND; VCC = 3.3 V | 6 | ||
| LOW-level output voltage (peak) | VOL(p) | 0.3 | 0.8 | V | VCC = 3.3 V; CL = 50 pF | 6 | |
| LOW-level output voltage (valley) | VOL(v) | -0.8 | -0.2 | V | VCC = 3.3 V; CL = 50 pF | 6 | |
| AC HIGH-level input voltage (dynamic) | VIH(AC) | 2.31 | V | VCC = 3.3 V; CL = 50 pF | 6 | ||
| AC LOW-level input voltage (dynamic) | VIL(AC) | 0.99 | V | VCC = 3.3 V; CL = 50 pF | 6 |
CAD (KiCad official)
- Symbol:
74LV244APWJ - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74lv244apwj-etched.step/74lv244apwj-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lv244apwj.step/74lv244apwj.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (12 pp, sha256
487d729599b9d2e0, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LV244APWJ
**Nexperia** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
74LV244APWJ from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for the 1Y0 to 1Y3 outputs, active LOW; a HIGH on this pin puts those outputs in the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 1A0; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 3 | 2Y0 | tri_state | Data output 2Y0 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 4 | 1A1 | input | Data input 1A1; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 5 | 2Y1 | tri_state | Data output 2Y1 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 6 | 1A2 | input | Data input 1A2; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 7 | 2Y2 | tri_state | Data output 2Y2 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 8 | 1A3 | input | Data input 1A3; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 9 | 2Y3 | tri_state | Data output 2Y3 of the 2OE-controlled buffer; it goes high-impedance when 2OE is HIGH. |
| 10 | GND | power_in | Ground (0 V); all voltages are referenced to this pin. |
| 11 | 2A3 | input | Data input 2A3; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 12 | 1Y3 | tri_state | Data output 1Y3 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 13 | 2A2 | input | Data input 2A2; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 14 | 1Y2 | tri_state | Data output 1Y2 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 15 | 2A1 | input | Data input 2A1; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 16 | 1Y1 | tri_state | Data output 1Y1 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 17 | 2A0 | input | Data input 2A0; inputs are overvoltage tolerant with Schmitt-trigger action, and the absolute input voltage range is -0.5 V to +7.0 V. |
| 18 | 1Y0 | tri_state | Data output 1Y0 of the 1OE-controlled buffer; it goes high-impedance when 1OE is HIGH. |
| 19 | 2OE | input | Output enable input for the 2Y0 to 2Y3 outputs, active LOW; a HIGH on this pin puts those outputs in the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage; the recommended operating range is 2.0 V to 5.5 V referenced to GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 7 | V | | 3 |
| input voltage | VI | -0.5 | | 7 | V | | 3 |
| output voltage | VO | -0.5 | | | V | active mode | 3 |
| output voltage | VO | -0.5 | | 7 | V | power-down or 3-state mode | 3 |
| input clamping current | IIK | -20 | | | mA | VI < 0 V | 3 |
| output clamping current | IOK | -50 | | | mA | VO < 0 V | 3 |
| output current | IO | -35 | | 35 | mA | VO = 0 V to VCC | 3 |
| supply current | ICC | | | 70 | mA | | 3 |
| ground current | IGND | -70 | | | mA | | 3 |
| storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| total power dissipation | Ptot | | | 500 | mW | Tamb = -40 °C to +125 °C | 3 |
| supply voltage | VCC | 2 | | 5.5 | V | | 4 |
| input voltage | VI | 0 | | 5.5 | V | | 4 |
| output voltage | VO | 0 | | | V | active mode | 4 |
| output voltage | VO | 0 | | 5.5 | V | power-down or 3-state mode | 4 |
| ambient temperature | Tamb | -40 | | 125 | °C | | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 200 | ns/V | VCC = 2.3 V to 2.7 V | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 100 | ns/V | VCC = 3.0 V to 3.6 V | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 20 | ns/V | VCC = 4.5 V to 5.5 V | 4 |
| HIGH-level input voltage | VIH | 1.5 | | | V | VCC = 2 V | 4 |
| LOW-level input voltage | VIL | | | 0.5 | V | VCC = 2 V | 4 |
| HIGH-level output voltage | VOH | 2 | | | V | VCC = 2.3 V; IO = -2 mA | 4 |
| HIGH-level output voltage | VOH | 2.48 | | | V | VCC = 3.0 V; IO = -8 mA | 4 |
| HIGH-level output voltage | VOH | 3.8 | | | V | VCC = 4.5 V; IO = -16 mA | 4 |
| LOW-level output voltage | VOL | | | 0.1 | V | VCC = 2.0 V to 5.5 V; IO = 50 μA | 4 |
| LOW-level output voltage | VOL | | | 0.4 | V | VCC = 2.3 V; IO = 2 mA | 4 |
| LOW-level output voltage | VOL | | | 0.44 | V | VCC = 3.0 V; IO = 8 mA | 4 |
| LOW-level output voltage | VOL | | | 0.55 | V | VCC = 4.5 V; IO = 16 mA | 4 |
| OFF-state output current | IOZ | -2.5 | | 2.5 | μA | VCC = 5.5 V; VI = VIH or VIL; VO = GND to 5.5 V | 4 |
| power-off leakage current | IOFF | | | 5 | μA | VI or VO = GND to 5.5 V; VCC = 0 V | 4 |
| input leakage current | II | -1 | | 1 | μA | VI = VCC or GND; VCC = 0 V to 5.5 V | 5 |
| supply current | ICC | | | 20 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 5 |
| propagation delay nAn to nYn | tpd | 1 | | 15 | ns | nAn to nYn; see Fig. 3; VCC = 2.3 V to 2.7 V; CL = 15 pF | 5 |
| propagation delay nAn to nYn | tpd | 1 | | 18 | ns | nAn to nYn; see Fig. 3; VCC = 2.3 V to 2.7 V; CL = 50 pF | 5 |
| propagation delay nAn to nYn | tpd | 1 | | 10 | ns | nAn to nYn; see Fig. 3; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 |
| propagation delay nAn to nYn | tpd | 1 | | 13.5 | ns | nAn to nYn; see Fig. 3; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 |
| propagation delay nAn to nYn | tpd | 1 | | 6.5 | ns | nAn to nYn; see Fig. 3; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 |
| propagation delay nAn to nYn | tpd | 1 | | 8.5 | ns | nAn to nYn; see Fig. 3; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
| enable time nOE to nYn | ten | 1 | | 17 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 15 pF | 5 |
| enable time nOE to nYn | ten | 1 | | 21 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 50 pF | 5 |
| enable time nOE to nYn | ten | 1 | | 12.5 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 |
| enable time nOE to nYn | ten | 1 | | 16 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 |
| enable time nOE to nYn | ten | 1 | | 8.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 |
| enable time nOE to nYn | ten | 1 | | 10.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
| disable time nOE to nYn | tdis | 1 | | 16 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 15 pF | 5 |
| disable time nOE to nYn | tdis | 1 | | 21 | ns | nOE to nYn; see Fig. 4; VCC = 2.3 V to 2.7 V; CL = 50 pF | 5 |
| disable time nOE to nYn | tdis | 1 | | 13 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 |
| disable time nOE to nYn | tdis | 1 | | 18 | ns | nOE to nYn; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 |
| disable time nOE to nYn | tdis | 1 | | 13.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 |
| disable time nOE to nYn | tdis | 1 | | 15.5 | ns | nOE to nYn; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
| skew | tsk(o) | | | 2 | ns | CL = 50 pF; VCC = 2.3 V to 2.7 V | 6 |
| skew | tsk(o) | | | 1.5 | ns | CL = 50 pF; VCC = 3.0 V to 3.6 V | 6 |
| skew | tsk(o) | | | 1 | ns | CL = 50 pF; VCC = 4.5 V to 5.5 V | 6 |
| input capacitance | CI | | | 6 | pF | VI = VCC or GND; VCC = 3.3 V | 6 |
| LOW-level output voltage (peak) | VOL(p) | | 0.3 | 0.8 | V | VCC = 3.3 V; CL = 50 pF | 6 |
| LOW-level output voltage (valley) | VOL(v) | -0.8 | -0.2 | | V | VCC = 3.3 V; CL = 50 pF | 6 |
| AC HIGH-level input voltage (dynamic) | VIH(AC) | 2.31 | | | V | VCC = 3.3 V; CL = 50 pF | 6 |
| AC LOW-level input voltage (dynamic) | VIL(AC) | | | 0.99 | V | VCC = 3.3 V; CL = 50 pF | 6 |
## CAD (KiCad official)
- Symbol: `74LV244APWJ`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `74lv244apwj-etched.step` / `74lv244apwj-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lv244apwj.step` / `74lv244apwj.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908563457069056) (12 pp, sha256 `487d729599b9d2e0`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lv244apwj-datasheet.pdf)