# 74LV138D

**Nexperia** · Signal Switches, Multiplexers, Decoders · SO-16

74LV138D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address input A0 selects one of the eight outputs Y0 to Y7 of the 3-to-8 decoder; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC, with IIK limited to ±20 mA. |
| 2 | A1 | input | Address input A1 selects one of the eight outputs Y0 to Y7 of the 3-to-8 decoder; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC, with IIK limited to ±20 mA. |
| 3 | A2 | input | Address input A2 selects one of the eight outputs Y0 to Y7 of the 3-to-8 decoder; inputs include clamp diodes so current-limiting resistors can interface voltages above VCC, with IIK limited to ±20 mA. |
| 4 | E1 | input | Enable input E1 is active LOW and must be LOW together with E2 and HIGH on E3 for the outputs to be enabled. |
| 5 | E2 | input | Enable input E2 is active LOW and must be LOW together with E1 and HIGH on E3 for the outputs to be enabled. |
| 6 | E3 | input | Enable input E3 is active HIGH and must be HIGH together with E1 and E2 LOW for the outputs to be enabled. |
| 7 | Y7 | output | Active LOW mutually exclusive decoder output Y7, HIGH unless selected; output current limited to ±25 mA. |
| 8 | GND | power_in | Ground pin (0 V) to which all voltages are referenced. |
| 9 | Y6 | output | Active LOW mutually exclusive decoder output Y6, HIGH unless selected; output current limited to ±25 mA. |
| 10 | Y5 | output | Active LOW mutually exclusive decoder output Y5, HIGH unless selected; output current limited to ±25 mA. |
| 11 | Y4 | output | Active LOW mutually exclusive decoder output Y4, HIGH unless selected; output current limited to ±25 mA. |
| 12 | Y3 | output | Active LOW mutually exclusive decoder output Y3, HIGH unless selected; output current limited to ±25 mA. |
| 13 | Y2 | output | Active LOW mutually exclusive decoder output Y2, HIGH unless selected; output current limited to ±25 mA. |
| 14 | Y1 | output | Active LOW mutually exclusive decoder output Y1, HIGH unless selected; output current limited to ±25 mA. |
| 15 | Y0 | output | Active LOW mutually exclusive decoder output Y0, HIGH unless selected; output current limited to ±25 mA. |
| 16 | VCC | power_in | Supply voltage, recommended 1.0 V to 5.5 V with an absolute maximum of 7.0 V referenced to GND. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 |  | 7 | V |  | 4 |
| Input clamping current | IIK | -20 |  | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V [1] | 4 |
| Output clamping current | IOK | -50 |  | 50 | mA | VO < -0.5 V or VO > VCC + 0.5 V [1] | 4 |
| Output current | IO | -25 |  | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 |
| Supply current | ICC |  |  | 50 | mA |  | 4 |
| Ground current | IGND | -50 |  |  | mA |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| Total power dissipation | Ptot |  |  | 500 | mW | Tamb = -40 °C to +125 °C [2] | 4 |
| Supply voltage | VCC | 1 | 3.3 | 5.5 | V |  | 5 |
| Input voltage | VI | 0 |  |  | V | maximum VCC | 5 |
| Output voltage | VO | 0 |  |  | V | maximum VCC | 5 |
| Ambient temperature | Tamb | -40 | 25 | 125 | °C |  | 5 |
| Input transition rise and fall rate | Δt/ΔV |  |  | 500 | ns/V | VCC = 1.0 V to 2.0 V | 5 |
| Input transition rise and fall rate | Δt/ΔV |  |  | 200 | ns/V | VCC = 2.0 V to 2.7 V | 5 |
| Input transition rise and fall rate | Δt/ΔV |  |  | 100 | ns/V | VCC = 2.7 V to 3.6 V | 5 |
| Input transition rise and fall rate | Δt/ΔV |  |  | 50 | ns/V | VCC = 3.6 V to 5.5 V | 5 |
| HIGH-level input voltage | VIH | 0.9 |  |  | V | VCC = 1.2 V | 5 |
| HIGH-level input voltage | VIH | 1.4 |  |  | V | VCC = 2.0 V | 5 |
| HIGH-level input voltage | VIH | 2 |  |  | V | VCC = 2.7 V to 3.6 V | 5 |
| LOW-level input voltage | VIL |  |  | 0.3 | V | VCC = 1.2 V | 5 |
| LOW-level input voltage | VIL |  |  | 0.6 | V | VCC = 2.0 V | 5 |
| LOW-level input voltage | VIL |  |  | 0.8 | V | VCC = 2.7 V to 3.6 V | 5 |
| HIGH-level output voltage | VOH | 1.8 | 2 |  | V | VI = VIH or VIL; IO = -100 μA; VCC = 2.0 V | 5 |
| HIGH-level output voltage | VOH | 2.5 | 2.7 |  | V | VI = VIH or VIL; IO = -100 μA; VCC = 2.7 V | 5 |
| HIGH-level output voltage | VOH | 2.8 | 3 |  | V | VI = VIH or VIL; IO = -100 μA; VCC = 3.0 V | 5 |
| HIGH-level output voltage | VOH | 4.3 | 4.5 |  | V | VI = VIH or VIL; IO = -100 μA; VCC = 4.5 V | 5 |
| HIGH-level output voltage | VOH | 2.2 | 2.82 |  | V | VI = VIH or VIL; IO = -6 mA; VCC = 3.0 V | 5 |
| HIGH-level output voltage | VOH | 3.5 | 4.2 |  | V | VI = VIH or VIL; IO = -12 mA; VCC = 4.5 V | 5 |
| LOW-level output voltage | VOL |  | 0 | 0.2 | V | VI = VIH or VIL; IO = 100 μA; VCC = 2.0 V | 6 |
| LOW-level output voltage | VOL |  | 0.25 | 0.5 | V | VI = VIH or VIL; IO = 6 mA; VCC = 3.0 V | 6 |
| LOW-level output voltage | VOL |  | 0.35 | 0.65 | V | VI = VIH or VIL; IO = 12 mA; VCC = 4.5 V | 6 |
| Input leakage current | II |  |  | 1 | μA | VI = VCC or GND; VCC = 5.5 V | 6 |
| Supply current | ICC |  |  | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 6 |
| Additional supply current | ΔICC |  |  | 850 | μA | per input; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V | 6 |
| Propagation delay An to Yn | tpd |  |  | 55 | ns | An to Yn; see Fig. 4; VCC = 2.0 V | 6 |
| Propagation delay An to Yn | tpd |  |  | 39 | ns | An to Yn; see Fig. 4; VCC = 2.7 V | 6 |
| Propagation delay An to Yn | tpd |  |  | 32 | ns | An to Yn; see Fig. 4; VCC = 3.0 V to 3.6 V | 6 |
| Propagation delay An to Yn | tpd |  |  | 22 | ns | An to Yn; see Fig. 4; VCC = 4.5 V to 5.5 V | 6 |
| Propagation delay E3, En to Yn | tpd |  |  | 53 | ns | E3, En to Yn; see Fig. 4 and Fig. 5; VCC = 2.0 V | 6 |
| Propagation delay E3, En to Yn | tpd |  |  | 38 | ns | E3, En to Yn; see Fig. 4 and Fig. 5; VCC = 2.7 V | 6 |
| Propagation delay E3, En to Yn | tpd |  |  | 31 | ns | E3, En to Yn; see Fig. 4 and Fig. 5; VCC = 3.0 V to 3.6 V | 6 |
| Propagation delay E3, En to Yn | tpd |  |  | 24 | ns | E3, En to Yn; see Fig. 4 and Fig. 5; VCC = 4.5 V to 5.5 V | 6 |

## CAD (KiCad official)

- Symbol: `74LV138D`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files: `74lv138d-etched.step` / `74lv138d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lv138d.step` / `74lv138d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74LV138D.pdf) (14 pp, sha256 `d991d29b2003d607`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74lv138d-datasheet.pdf)