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74LV123BQ

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Nexperia Monostable Multivibrators, DHVQFN-16-EP(2.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74LV123BQ

Nexperia · Monostable Multivibrators · DHVQFN-16-EP(2.5x3.5)

74LV123BQ from Nexperia, in a DHVQFN-16-EP(2.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Negative-edge triggered input 1; Schmitt-trigger input with clamp diodes that allow current-limited input voltages in excess of VCC.
2 1B input Positive-edge triggered input 1; Schmitt-trigger input with clamp diodes that allow current-limited input voltages in excess of VCC.
3 1RD input Direct reset LOW and positive-edge triggered input 1; a LOW level terminates the output pulse of monostable 1.
4 1Q output Active LOW output 1 of the monostable multivibrator.
5 2Q output Active HIGH output 2 of the monostable multivibrator.
6 2CEXT passive External capacitor connection 2; for minimum noise generation the datasheet recommends grounding it externally to pin 8 (GND).
7 2REXT/CEXT passive External resistor and capacitor connection 2 for setting the output pulse width of monostable 2 (tW = K x REXT x CEXT).
8 GND power_in Ground (0 V) reference for all voltages, limits and characteristics in the datasheet.
9 2A input Negative-edge triggered input 2; Schmitt-trigger input with clamp diodes that allow current-limited input voltages in excess of VCC.
10 2B input Positive-edge triggered input 2; Schmitt-trigger input with clamp diodes that allow current-limited input voltages in excess of VCC.
11 2RD input Direct reset LOW and positive-edge triggered input 2; a LOW level terminates the output pulse of monostable 2.
12 2Q output Active LOW output 2 of the monostable multivibrator.
13 1Q output Active HIGH output 1 of the monostable multivibrator.
14 1CEXT passive External capacitor connection 1; for minimum noise generation the datasheet recommends grounding it externally to pin 8 (GND).
15 1REXT/CEXT passive External resistor and capacitor connection 1 for setting the output pulse width of monostable 1 (tW = K x REXT x CEXT).
16 VCC power_in Supply voltage, recommended range 1.0 V to 5.5 V; absolute maximum is -0.5 V to +7 V.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-16-EP(2.5x3.5)
Category Logic
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 5
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 5
Output clamping current IOK -50 50 mA VO < -0.5 V or VO > VCC + 0.5 V 5
Output current IO -25 25 mA except for pins nREXT/CEXT; VO = -0.5 V to (VCC + 0.5 V) 5
Supply current ICC 50 mA 5
Ground current IGND -50 mA 5
Storage temperature Tstg -65 150 °C 5
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 5
Supply voltage VCC 1 3.3 5.5 V 6
Input voltage VI 0 V maximum is VCC 6
Output voltage VO 0 V maximum is VCC 6
Ambient temperature Tamb -40 25 125 °C in free air 6
Input transition rise and fall rate Δt/ΔV 500 ns/V VCC = 1.0 V to 2.0 V 6
Input transition rise and fall rate Δt/ΔV 200 ns/V VCC = 2.0 V to 2.7 V 6
Input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 2.7 V to 3.6 V 6
Input transition rise and fall rate Δt/ΔV 50 ns/V VCC = 3.6 V to 5.5 V 6
HIGH-level input voltage VIH 0.9 V Tamb = -40 °C to +125 °C; VCC = 1.2 V 7
HIGH-level input voltage VIH 1.4 V Tamb = -40 °C to +125 °C; VCC = 2.0 V 7
HIGH-level input voltage VIH 2 V Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V 7
LOW-level input voltage VIL 0.3 V Tamb = -40 °C to +125 °C; VCC = 1.2 V 7
LOW-level input voltage VIL 0.6 V Tamb = -40 °C to +125 °C; VCC = 2.0 V 7
LOW-level input voltage VIL 0.8 V Tamb = -40 °C to +125 °C; VCC = 2.7 V to 3.6 V 7
HIGH-level output voltage VOH 1.8 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -100 μA; VCC = 2.0 V 7
HIGH-level output voltage VOH 2.5 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -100 μA; VCC = 2.7 V 7
HIGH-level output voltage VOH 2.8 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -100 μA; VCC = 3.0 V 7
HIGH-level output voltage VOH 4.3 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -100 μA; VCC = 4.5 V 7
HIGH-level output voltage VOH 2.2 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -6 mA; VCC = 3.0 V 7
HIGH-level output voltage VOH 3.5 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = -12 mA; VCC = 4.5 V 7
LOW-level output voltage VOL 0.2 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 100 μA; VCC = 2.0 V 7
LOW-level output voltage VOL 0.5 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 6 mA; VCC = 3.0 V 7
LOW-level output voltage VOL 0.65 V Tamb = -40 °C to +125 °C; VI = VIH or VIL; IO = 12 mA; VCC = 4.5 V 7
Input leakage current II 1 μA Tamb = -40 °C to +125 °C; VI = VCC or GND; VCC = 5.5 V 7
Supply current ICC 160 μA Tamb = -40 °C to +125 °C; VI = VCC or GND; IO = 0 A; VCC = 5.5 V 7
Additional supply current ΔICC 850 μA Tamb = -40 °C to +125 °C; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V 7
Propagation delay nRD, nA and nB to nQ tpd 92 ns nRD, nA and nB to nQ; see Fig. 5; VCC = 2.0 V; -40 °C to +125 °C 8
Propagation delay nRD, nA and nB to nQ tpd 68 ns nRD, nA and nB to nQ; see Fig. 5; VCC = 2.7 V; -40 °C to +125 °C 8
Propagation delay nRD, nA and nB to nQ tpd 57 ns nRD, nA and nB to nQ; see Fig. 5; VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 8
Propagation delay nRD, nA and nB to nQ tpd 46 ns nRD, nA and nB to nQ; see Fig. 5; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 8
Propagation delay nRD to nQ (reset) tpd 68 ns nRD to nQ (reset); VCC = 2.0 V; -40 °C to +125 °C 8
Propagation delay nRD to nQ (reset) tpd 51 ns nRD to nQ (reset); VCC = 2.7 V; -40 °C to +125 °C 8
Propagation delay nRD to nQ (reset) tpd 45 ns nRD to nQ (reset); VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 8
Propagation delay nRD to nQ (reset) tpd 36 ns nRD to nQ (reset); VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 8
Pulse width tW 40 ns Inputs nA, nB and nRD; see Fig. 5; nA = LOW; VCC = 2.0 V; -40 °C to +125 °C 8
Pulse width tW 30 ns Inputs nA, nB and nRD; see Fig. 5; nA = LOW; VCC = 2.7 V; -40 °C to +125 °C 8
Pulse width tW 25 ns Inputs nA, nB and nRD; see Fig. 5; nA = LOW; VCC = 3.0 V to 3.6 V; -40 °C to +125 °C 8
Pulse width tW 20 ns Inputs nA, nB and nRD; see Fig. 5; nA = LOW; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 8
Pulse width tW 45 ns nRD = LOW; see Fig. 11; VCC = 2.0 V; -40 °C to +125 °C 8

CAD (KiCad official)

  • Symbol: 74LV123BQ
  • Footprint: Package_DFN_QFN:DHVQFN-16-1EP_2.5x3.5mm_P0.5mm_EP1x2mm
  • 3D model: DHVQFN-16-EP(2.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: 74lv123bq-etched.step / 74lv123bq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lv123bq.step / 74lv123bq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (19 pp, sha256 ef158071d430c9dc, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF