component
74LCX574FT
Public Made by Adomby adom
TOSHIBA Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| docs | 17h ago |
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| 74lcx574ft-etched.step | 17h ago |
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74LCX574FT
TOSHIBA · Flip Flops · TSSOP-20
74LCX574FT from TOSHIBA, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Active-low output enable input; when high the eight outputs Q0-Q7 are in a high-impedance state. |
| 2 | D0 | input | Data input 0 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 3 | D1 | input | Data input 1 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 4 | D2 | input | Data input 2 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 5 | D3 | input | Data input 3 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 6 | D4 | input | Data input 4 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 7 | D5 | input | Data input 5 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 8 | D6 | input | Data input 6 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 9 | D7 | input | Data input 7 of the octal D-type flip-flop, tolerant of 5-V inputs. |
| 10 | GND | power_in | Ground pin (0 V reference) for the device. |
| 11 | CK | input | Clock input that controls the octal D-type flip-flop. |
| 12 | Q7 | tri_state | 3-state output 7, high-impedance when OE is high, 5-V tolerant, with |
| 13 | Q6 | tri_state | 3-state output 6, high-impedance when OE is high, 5-V tolerant, with |
| 14 | Q5 | tri_state | 3-state output 5, high-impedance when OE is high, 5-V tolerant, with |
| 15 | Q4 | tri_state | 3-state output 4, high-impedance when OE is high, 5-V tolerant, with |
| 16 | Q3 | tri_state | 3-state output 3, high-impedance when OE is high, 5-V tolerant, with |
| 17 | Q2 | tri_state | 3-state output 2, high-impedance when OE is high, 5-V tolerant, with |
| 18 | Q1 | tri_state | 3-state output 1, high-impedance when OE is high, 5-V tolerant, with |
| 19 | Q0 | tri_state | 3-state output 0, high-impedance when OE is high, 5-V tolerant, with |
| 20 | VCC | power_in | Supply voltage pin with operating range of 1.65 to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 6.5 | V | 4 | ||
| Input voltage | VIN | -0.5 | 6.5 | V | 4 | ||
| Output voltage | VOUT | -0.5 | 6.5 | V | Note 3: VOUT < GND, VOUT > VCC | 4 | |
| Input diode current | IIK | -50 | mA | 4 | |||
| Output diode current | IOK | -50 | 50 | mA | 4 | ||
| Output current | IOUT | -50 | 50 | mA | Note 2: IOUT absolute maximum rating must be observed | 4 | |
| Power dissipation | PD | 180 | mW | 4 | |||
| VCC/ground current | ICC/IGND | -100 | 100 | mA | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 1.65 | 3.6 | V | Note 1: data retention only | 4 | |
| Input voltage | VIN | 1.5 | 3.6 | V | 4 | ||
| Output voltage | VOUT | 0 | 5.5 | V | Note 2: output in OFF state | 4 | |
| Output voltage | VOUT | 0 | V | Note 3: high or low state (max VCC) | 4 | ||
| Output current | IOH,IOL | -24 | 24 | mA | VCC = 3.0 to 3.6 V | 4 | |
| Output current | IOH,IOL | -12 | 12 | mA | VCC = 2.7 to 3.0 V | 4 | |
| Operating temperature | Topr | -40 | 85 | °C | 4 | ||
| Input rise and fall times | dt/dv | 0 | 10 | ns/V | VIN = 0.8 to 2.0 V, VCC = 3.0 V | 4 | |
| High-level input voltage | VIH | 1.7 | V | VCC = 2.3 to 2.7 V | 5 | ||
| High-level input voltage | VIH | 2 | V | VCC = 2.7 to 3.6 V | 5 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC = 2.3 to 2.7 V | 5 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC = 2.7 to 3.6 V | 5 | ||
| High-level output voltage | VOH | 1.05 | V | IOH = -4 mA, VCC = 1.65 V | 5 | ||
| High-level output voltage | VOH | 1.7 | V | IOH = -8 mA, VCC = 2.3 V | 5 | ||
| High-level output voltage | VOH | 2.2 | V | IOH = -12 mA, VCC = 2.7 V | 5 | ||
| High-level output voltage | VOH | 2.4 | V | IOH = -18 mA, VCC = 3.0 V | 5 | ||
| Low-level output voltage | VOL | 0.2 | V | IOL = 100 µA, VCC = 1.65 to 3.6 V | 5 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 4 mA, VCC = 1.65 V | 5 | ||
| Low-level output voltage | VOL | 0.7 | V | IOL = 8 mA, VCC = 2.3 V | 5 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = 12 mA, VCC = 2.7 V | 5 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = 24 mA, VCC = 3.0 V | 5 | ||
| Input leakage current | IIN | -5 | 5 | µA | VIN = 0 to 5.5 V, VCC = 1.65 to 3.6 V | 5 | |
| 3-state output OFF-state leakage current | IOZ | -5 | 5 | µA | VIN = VIH or VIL, VOUT = 0 to 5.5 V, VCC = 1.65 to 3.6 V | 5 | |
| Power-OFF leakage current | IOFF | 10 | µA | VIN/VOUT = 5.5 V, VCC = 0 | 5 | ||
| Quiescent supply current | ICC | 10 | µA | VIN = VCC or GND, VCC = 1.65 to 3.6 V | 5 | ||
| Quiescent supply current | ΔICC | 500 | µA | VIH = VCC - 0.6 V (per input), VCC = 2.7 to 3.6 V | 5 | ||
| Maximum clock frequency | fMAX | 50 | MHz | VCC = 1.8 ± 0.15 V | 6 | ||
| Maximum clock frequency | fMAX | 100 | MHz | VCC = 2.5 ± 0.2 V | 6 | ||
| Maximum clock frequency | fMAX | 150 | MHz | VCC = 3.3 ± 0.3 V | 6 | ||
| Propagation delay time (CK-Q) | tPLH,tPHL | 30 | ns | VCC = 1.8 ± 0.15 V | 6 | ||
| Propagation delay time (CK-Q) | tPLH,tPHL | 10.5 | ns | VCC = 2.5 ± 0.2 V | 6 | ||
| Propagation delay time (CK-Q) | tPLH,tPHL | 9.5 | ns | VCC = 2.7 V | 6 | ||
| Propagation delay time (CK-Q) | tPLH,tPHL | 8.5 | ns | VCC = 3.3 ± 0.3 V | 6 | ||
| Minimum pulse width (CK) | tw(L),tw(H) | 10 | ns | VCC = 1.8 ± 0.15 V | 6 | ||
| Minimum pulse width (CK) | tw(L),tw(H) | 5 | ns | VCC = 2.5 ± 0.2 V | 6 | ||
| Minimum pulse width (CK) | tw(L),tw(H) | 3.3 | ns | VCC = 2.7 V | 6 | ||
| Minimum setup time | tS | 10 | ns | VCC = 1.8 ± 0.15 V | 6 | ||
| Minimum setup time | tS | 5 | ns | VCC = 2.5 ± 0.2 V | 6 | ||
| Minimum setup time | tS | 2.5 | ns | VCC = 2.7 V | 6 | ||
| Minimum hold time | th | 1.5 | ns | VCC = 1.8 ± 0.15 V | 6 |
CAD (KiCad official)
- Symbol:
74LCX574FT - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74lcx574ft-etched.step/74lcx574ft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lcx574ft.step/74lcx574ft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (10 pp, sha256
1227efe1de382909, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).