component
74LCX08FT
Public Made by Adomby adom
TOSHIBA Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| 74lcx08ft-etched.glb | 5d ago |
| 74lcx08ft-etched.step | 5d ago |
| 74lcx08ft-hero.glb | 5d ago |
| 74lcx08ft-hero.overlay.json | 5d ago |
| 74lcx08ft.glb | 5d ago |
| 74lcx08ft.kicad_mod | 5d ago |
| 74lcx08ft.kicad_sym | 5d ago |
| 74lcx08ft.lbr | 5d ago |
| 74lcx08ft.step | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
74LCX08FT
TOSHIBA · Logic Gates · TSSOP-14
74LCX08FT from TOSHIBA, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 2 | 1B | input | Gate 1 input B; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 3 | 1Y | output | Gate 1 AND output, rated for |
| 4 | 2A | input | Gate 2 input A; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 5 | 2B | input | Gate 2 input B; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 6 | 2Y | output | Gate 2 AND output, rated for |
| 7 | GND | power_in | Ground reference (0 V) for the device. |
| 8 | 3Y | output | Gate 3 AND output, rated for |
| 9 | 3A | input | Gate 3 input A; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 10 | 3B | input | Gate 3 input B; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 11 | 4Y | output | Gate 4 AND output, rated for |
| 12 | 4A | input | Gate 4 input A; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 13 | 4B | input | Gate 4 input B; inputs accept 0 to 5.5 V and unused inputs must be tied to VCC or GND. |
| 14 | VCC | power_in | Supply voltage pin, operating range 1.65 to 3.6 V with absolute maximum of -0.5 to 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
74LCX08FT - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74lcx08ft-etched.step/74lcx08ft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lcx08ft.step/74lcx08ft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (9 pp, sha256
72c362d2e9b86ab5, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).