component
74LCX00MTC
Public Made by Adomby adom
onsemi Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74LCX00MTC
onsemi · Logic Gates · TSSOP-14
74LCX00MTC from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Gate 0 input A; inputs tolerate voltages up to 7V. |
| 2 | B0 | input | Gate 0 input B; inputs tolerate voltages up to 7V. |
| 3 | O0 | output | Gate 0 NAND output (active-low O0 = NOT(A0·B0)), ±24mA drive at VCC = 3.0V. |
| 4 | A1 | input | Gate 1 input A; inputs tolerate voltages up to 7V. |
| 5 | B1 | input | Gate 1 input B; inputs tolerate voltages up to 7V. |
| 6 | O1 | output | Gate 1 NAND output, ±24mA drive at VCC = 3.0V. |
| 7 | GND | power_in | Ground. |
| 8 | O3 | output | Gate 3 NAND output, ±24mA drive at VCC = 3.0V. |
| 9 | B3 | input | Gate 3 input B; inputs tolerate voltages up to 7V. |
| 10 | A3 | input | Gate 3 input A; inputs tolerate voltages up to 7V. |
| 11 | O2 | output | Gate 2 NAND output, ±24mA drive at VCC = 3.0V. |
| 12 | B2 | input | Gate 2 input B; inputs tolerate voltages up to 7V. |
| 13 | A2 | input | Gate 2 input A; inputs tolerate voltages up to 7V. |
| 14 | VCC | power_in | Positive supply; 2.3V-3.6V VCC specifications provided. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
74LCX00MTC - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74lcx00mtc-etched.step/74lcx00mtc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74lcx00mtc.step/74lcx00mtc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
f5d468fa747f8d9d, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74LCX00MTC
**onsemi** · Logic Gates · TSSOP-14
74LCX00MTC from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Gate 0 input A; inputs tolerate voltages up to 7V. |
| 2 | B0 | input | Gate 0 input B; inputs tolerate voltages up to 7V. |
| 3 | O0 | output | Gate 0 NAND output (active-low O0 = NOT(A0·B0)), ±24mA drive at VCC = 3.0V. |
| 4 | A1 | input | Gate 1 input A; inputs tolerate voltages up to 7V. |
| 5 | B1 | input | Gate 1 input B; inputs tolerate voltages up to 7V. |
| 6 | O1 | output | Gate 1 NAND output, ±24mA drive at VCC = 3.0V. |
| 7 | GND | power_in | Ground. |
| 8 | O3 | output | Gate 3 NAND output, ±24mA drive at VCC = 3.0V. |
| 9 | B3 | input | Gate 3 input B; inputs tolerate voltages up to 7V. |
| 10 | A3 | input | Gate 3 input A; inputs tolerate voltages up to 7V. |
| 11 | O2 | output | Gate 2 NAND output, ±24mA drive at VCC = 3.0V. |
| 12 | B2 | input | Gate 2 input B; inputs tolerate voltages up to 7V. |
| 13 | A2 | input | Gate 2 input A; inputs tolerate voltages up to 7V. |
| 14 | VCC | power_in | Positive supply; 2.3V-3.6V VCC specifications provided. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `74LCX00MTC`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74lcx00mtc-etched.step` / `74lcx00mtc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74lcx00mtc.step` / `74lcx00mtc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/74lcx00mtc-d.pdf) (14 pp, sha256 `f5d468fa747f8d9d`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74lcx00mtc-datasheet.pdf)