# 74HCT86D

**Nexperia** · Logic Gates · SOIC-14

74HCT86D from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A of EXCLUSIVE-OR gate 1; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 2 | 1B | input | Data input 1B of EXCLUSIVE-OR gate 1; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 3 | 1Y | output | Data output 1Y of EXCLUSIVE-OR gate 1 (Y = A XOR B); output current limited to ±25 mA. |
| 4 | 2A | input | Data input 2A of EXCLUSIVE-OR gate 2; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 5 | 2B | input | Data input 2B of EXCLUSIVE-OR gate 2; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 6 | 2Y | output | Data output 2Y of EXCLUSIVE-OR gate 2 (Y = A XOR B); output current limited to ±25 mA. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3Y | output | Data output 3Y of EXCLUSIVE-OR gate 3 (Y = A XOR B); output current limited to ±25 mA. |
| 9 | 3A | input | Data input 3A of EXCLUSIVE-OR gate 3; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 10 | 3B | input | Data input 3B of EXCLUSIVE-OR gate 3; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 11 | 4Y | output | Data output 4Y of EXCLUSIVE-OR gate 4 (Y = A XOR B); output current limited to ±25 mA. |
| 12 | 4A | input | Data input 4A of EXCLUSIVE-OR gate 4; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 13 | 4B | input | Data input 4B of EXCLUSIVE-OR gate 4; inputs include clamp diodes so a current-limiting resistor can interface inputs above VCC, with input clamping current limited to ±20 mA. |
| 14 | VCC | power_in | Supply voltage; 74HCT86 recommended operating range is 4.5 V to 5.5 V (absolute maximum -0.5 V to +7 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `74HCT86D`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `74hct86d-etched.step` / `74hct86d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hct86d.step` / `74hct86d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586186969432379392) (12 pp, sha256 `efb3cf17b91fff76`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hct86d-datasheet.pdf)