# 74HCT595S16-13

**Diodes Incorporated** · Shifting Register · SO-16

74HCT595S16-13 from Diodes Incorporated, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q1 | tri_state | Parallel data output 1 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 2 | Q2 | tri_state | Parallel data output 2 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 3 | Q3 | tri_state | Parallel data output 3 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 4 | Q4 | tri_state | Parallel data output 4 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 5 | Q5 | tri_state | Parallel data output 5 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 6 | Q6 | tri_state | Parallel data output 6 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 7 | Q7 | tri_state | Parallel data output 7 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; the Q7 standard output is rated to ±25 mA continuous. |
| 8 | GND | power_in | Ground reference for the device; unused inputs must be held at VCC or ground. |
| 9 | Q7S | output | Serial data output presents the contents of the last shift register stage for cascading, with Q7S VOH and VOL specified at ±4 mA at VCC = 4.5 V. |
| 10 | MR | input | Active-LOW master reset that clears all shift register values to zero and operates independently of the clocks. |
| 11 | SHCP | input | Shift register clock input; the shift register captures DS on the rising edge and changes state on the falling edge. |
| 12 | STCP | input | Storage register clock input; a rising edge transfers the shift register contents to the output register. |
| 13 | OE | input | Active-LOW output enable that activates the Q0-Q7 3-state outputs when LOW and forces them to high-impedance when HIGH. |
| 14 | DS | input | Serial data input to the shift register, sampled on the rising edge of the shift clock; inputs accept up to 6.0 V. |
| 15 | Q0 | tri_state | Parallel data output 0 is a 3-state output that is active when OE is LOW and high-impedance when OE is HIGH; Qn bus driver outputs are rated to ±35 mA continuous. |
| 16 | Vcc | power_in | Supply voltage, recommended operating range 4.5 V to 5.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-16 |
| Category | Logic ICs |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage Range | VCC | -0.5 |  | 7 | V | TA = +25°C | 4 |
| Input Voltage Range | VI | -0.5 |  | 7 | V | TA = +25°C | 4 |
| Output voltage in high or low state | Vo | -0.3 |  | 5.5 | V | -0.3 to VCC +0.5 V; max shown at VCC=5.0V is not printed, listed from VCC+0.5 only | 4 |
| Input Clamp Current | IIK | -20 |  | 20 | mA | VI < -0.5V (-20); VI > Vcc +0.5V (20) | 4 |
| Output Clamp Current | IOK | -20 |  | 20 | mA | VO < -0.5V (-20); VO > VCC + 0.5V (20) | 4 |
| Continuous output current, Q7 standard output | IO | -25 |  | 25 | mA | Q7 standard output | 4 |
| Continuous output current, Qn bus driver outputs | IO | -35 |  | 35 | mA | Qn bus driver outputs | 4 |
| Continuous current through VCC | ICC |  |  | 70 | mA | Continuous current through VCC or GND | 4 |
| Continuous current through GND | IGND | -70 |  |  | mA | Continuous current through VCC or GND | 4 |
| Operating Junction Temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Storage Temperature | TSTG | -65 |  | 150 | °C |  | 4 |
| Total Power Dissipation | PTOT |  |  | 500 | mW |  | 4 |
| ESD HBM | ESD HBM |  |  | 2 | kV | Human Body Model | 4 |
| ESD CDM | ESD CDM |  |  | 1 | kV | Charged Device Model | 4 |
| ESD MM | ESD MM |  |  | 200 | V | Machine Model | 4 |
| Supply Voltage | VCC | 4.5 |  | 5.5 | V |  | 4 |
| Input Voltage | VI | 0 |  | 5.5 | V |  | 4 |
| Output Voltage | VO | 0 |  |  | V | Active Mode; max = VCC | 4 |
| Input transition rise or fall rate | t/V |  |  | 100 | ns/V | VCC = 4.5V to 5.5V | 4 |
| Operating free-air temperature | TA | -40 |  | 125 | °C |  | 4 |
| High-Level Input Voltage | VIH | 2 |  |  | V | VCC 4.5V to 5.5V; TA=+25°C (same min 2.0 at -40 to 85 and -40 to 125°C) | 5 |
| Low-Level Input Voltage | VIL |  |  | 0.8 | V | VCC 4.5V to 5.5V; TA=+25°C (0.8 also at -40 to 85 and -40 to 125°C) | 5 |
| High-Level Output Voltage, all outputs | VOH | 4.4 | 4.5 |  | V | IOH = -20μA, VCC 4.5V, TA=+25°C (4.4 at -40 to 85 and -40 to 125°C) | 5 |
| High-Level Output Voltage, Q7S | VOH | 3.84 | 4.32 |  | V | IOH = -4mA, VCC 4.5V, TA=+25°C (-40 to 125°C min 3.7) | 5 |
| High-Level Output Voltage, Qn Bus | VOH | 3.7 | 4.32 |  | V | IOH = -6.0mA, VCC 4.5V, TA=+25°C (-40 to 125°C min 3.7) | 5 |
| Low-Level Output Voltage, all outputs | VOL |  | 0 | 0.1 | V | IOL = 20μA, VCC 4.5V, TA=+25°C (0.1 at other temps) | 5 |
| Low-Level Output Voltage, Q7S | VOL |  | 0.15 | 0.33 | V | IOL = 4mA, VCC 4.5V, TA=+25°C (0.33 at -40 to 85; 0.4 at -40 to 125) | 5 |
| Low-Level Output Voltage, Qn Bus | VOL |  | 0.016 | 0.33 | V | IOL = 6.0mA, VCC 4.5V, TA=+25°C (0.33 at -40 to 85; 0.4 at -40 to 125); typ printed as .016 | 5 |
| Input Current | II | -0.1 |  | 0.1 | μA | VI = GND to 5.5V, VCC 5.5V, TA=+25°C (±1 at -40 to 85 and -40 to 125) | 5 |
| OFF-state output current | IOZ | -5 |  | 5 | μA | Qn internal high or low, Vo=Vcc or Gnd, VCC 5.5V, TA=+25°C (±5 at -40 to 85; ±10 at -40 to 125) | 5 |
| Supply Current | ICC |  |  | 8 | μA | VI = GND or VCC, IO=0, VCC 5.5V, TA=+25°C (80 at -40 to 85; 160 at -40 to 125) | 5 |
| Additional Supply Current per Input | ∆ICC |  | 100 | 450 | μA | VI = Vcc -2.1V, IO=0, VCC 4.5V to 5.5V, TA=+25°C (450 at -40 to 85; 490 at -40 to 125) | 5 |
| Input Capacitance | Ci |  | 4 | 10 | pF | Vi = VCC or GND, VCC 5.5V, TA=+25°C (10 at other temps) | 5 |
| Power dissipation capacitance | Cpd |  | 42 |  | pF | f = 1 MHz all outputs switching-no load, VCC = 5V | 5 |
| Maximum Frequency SHCP or STCP | fMAX | 30 | 52 |  | MHz | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (24 at -40 to 85; 20 at -40 to 125) | 6 |
| Pulse Width SHCP HIGH or LOW | tW | 16 | 6 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (20 at -40 to 85; 24 at -40 to 125) | 6 |
| Pulse Width STCP HIGH or LOW | tW | 16 | 5 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (20 at -40 to 85; 24 at -40 to 125) | 6 |
| Pulse Width MR LOW | tW | 20 | 8 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (25 at -40 to 85; 30 at -40 to 125) | 6 |
| Set-up Time DS to SHCP | tSU | 16 | 5 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (20 at -40 to 85; 24 at -40 to 125) | 6 |
| Set-up Time SHCP to STCP | tSU | 16 | 8 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (20 at -40 to 85; 24 at -40 to 125) | 6 |
| Hold Time DS to SHCP | tH | 3 | -2 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (3 at -40 to 85; 3 at -40 to 125) | 6 |
| Recovery Time MR to SHCP | tREC | 10 | -7 |  | ns | Figure 1, VCC 4.5V to 5.5V, TA=+25°C (13 at -40 to 85; 15 at -40 to 125) | 6 |
| Propagation Delay SHCP to Q7S | tPD |  | 25 | 42 | ns | Figure 1, CL=50pF, VCC 4.5V to 5.5V, TA=+25°C (53 at -40 to 85; 63 at -40 to 125) | 6 |
| Propagation Delay STCP to Qn | tPD |  | 24 | 40 | ns | Figure 1, CL=50pF, VCC 4.5V to 5.5V, TA=+25°C (50 at -40 to 85; 60 at -40 to 125) | 6 |
| Propagation Delay MR to Q7S | tPD |  | 23 | 40 | ns | Figure 1, CL=50pF, VCC 4.5V to 5.5V, TA=+25°C (50 at -40 to 85; 60 at -40 to 125) | 6 |
| Enable Time OE to Qn | tEN |  | 21 | 35 | ns | Figure 1, CL=50pF, VCC 4.5V to 5.5V, TA=+25°C (44 at -40 to 85; 53 at -40 to 125) | 6 |
| Disable Time OE to Qn | tDIS |  | 18 | 30 | ns | Figure 1, CL=50pF, VCC 4.5V to 5.5V, TA=+25°C (38 at -40 to 85; 45 at -40 to 125) | 6 |

## CAD (KiCad official)

- Symbol: `74HCT595S16-13`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files: `74hct595s16-13-etched.step` / `74hct595s16-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hct595s16-13.step` / `74hct595s16-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/74HCT595S16-13.pdf) (11 pp, sha256 `aa54f11b20bb804d`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hct595s16-13-datasheet.pdf)