# 74HCT594S16-13

**Diodes Incorporated** · Shift Registers · SOIC-16

74HCT594S16-13 from Diodes Incorporated, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q1 | output | Parallel data output 1 is a push-pull output that is updated from the storage register when STCP rises. |
| 2 | Q2 | output | Parallel data output 2 is a push-pull output that is updated from the storage register when STCP rises. |
| 3 | Q3 | output | Parallel data output 3 is a push-pull output that is updated from the storage register when STCP rises. |
| 4 | Q4 | output | Parallel data output 4 is a push-pull output that is updated from the storage register when STCP rises. |
| 5 | Q5 | output | Parallel data output 5 is a push-pull output that is updated from the storage register when STCP rises. |
| 6 | Q6 | output | Parallel data output 6 is a push-pull output that is updated from the storage register when STCP rises. |
| 7 | Q7 | output | Parallel data output 7 is a push-pull output that is updated from the storage register when STCP rises. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | Q7S | output | Serial data output used to cascade information to another device, taken from shift register stage 7. |
| 10 | SHR | input | Active-low shift register reset that sets all shift register stages to zero, independent of the clocks. |
| 11 | SHCP | input | Shift register clock; DS is shifted into the shift register on each positive transition. |
| 12 | STCP | input | Storage register clock; a rising pulse transfers the shift register contents into the output register. |
| 13 | STR | input | Active-low storage register reset that sets all storage register values to zero, independent of the clocks. |
| 14 | DS | input | Serial data input to shift register stage 0; inputs accept up to 6.0 V with Schmitt-trigger action. |
| 15 | Q0 | output | Parallel data output 0 is a push-pull output that is updated from the storage register when STCP rises. |
| 16 | VCC | power_in | Supply voltage; recommended operating range is 4.5 V to 5.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.5 |  | 5.5 | V |  | 4 |
| Input Voltage | VI | 0 |  | 5.5 | V |  | 4 |
| Output Voltage | VO | 0 |  |  | V | Active Mode | 4 |
| Input transition rise or fall rate | t/V |  |  | 500 | ns/V | VCC = 4.5V to 5.5V | 4 |
| Operating free-air temperature | TA | -40 |  | 125 | °C |  | 4 |
| Supply Voltage Range | VCC | -0.5 |  | 7 | V |  | 4 |
| Input Voltage Range | VI | -0.5 |  | 7 | V |  | 4 |
| Voltage applied to output in high or low state | Vo | -0.3 |  |  | V | High or low state | 4 |
| Input Clamp Current | IIK | -20 |  |  | mA | VI < -0.5V | 4 |
| Input Clamp Current | IIK |  |  | 20 | mA | VI > VCC +0.5V | 4 |
| Output Clamp Current | IOK | -20 |  |  | mA | VO < -0.5V | 4 |
| Output Clamp Current | IOK |  |  | 20 | mA | VO > VCC + 0.5V | 4 |
| Continuous output current | IO | -25 |  | 25 | mA | Q7 standard output | 4 |
| Continuous output current | IO | -35 |  | 35 | mA | Qn bus driver outputs | 4 |
| Continuous current through VCC | ICC |  |  | 70 | mA |  | 4 |
| Continuous current through GND | IGND | -70 |  |  | mA |  | 4 |
| Operating Junction Temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Storage Temperature | TSTG | -65 |  | 150 | °C |  | 4 |
| Total Power Dissipation | PTOT |  |  | 500 | mW |  | 4 |
| High-level Input Voltage | VIH | 2 | 1.6 |  | V | VCC 4.5 V to 5.5 V, TA = +25°C | 5 |
| High-level Input Voltage | VIH | 2 |  |  | V | VCC 4.5 V to 5.5 V, TA = -40°C to +125°C | 5 |
| Low-level input voltage | VIL |  |  | 0.8 | V | VCC 4.5 V to 5.5 V, TA = +25°C | 5 |
| High Level Output Voltage, all outputs | VOH | 4.4 | 4.5 |  | V | IOH = -20μA, All outputs, VCC 4.5 V, TA = +25°C | 5 |
| High Level Output Voltage, all outputs | VOH | 4.4 |  |  | V | IOH = -20μA, All outputs, VCC 4.5 V, TA = -40°C to +125°C | 5 |
| High Level Output Voltage, Q7S output | VOH | 3.98 | 4.32 |  | V | IOH = -4.0mA, VCC 4.5 V, TA = +25°C | 5 |
| High Level Output Voltage, Q7S output | VOH | 3.7 |  |  | V | IOH = -4.0mA, VCC 4.5 V, TA = -40°C to +125°C | 5 |
| High Level Output Voltage, Qn bus outputs | VOH | 3.98 | 4.32 |  | V | IOH = -6.0 mA, VCC 4.5 V, TA = +25°C | 5 |
| High Level Output Voltage, Qn bus outputs | VOH | 3.7 |  |  | V | IOH = -6.0 mA, VCC 4.5 V, TA = -40°C to +125°C | 5 |
| Low Level Output Voltage, all outputs | VOL |  | 0 | 0.1 | V | IOL = 20μA, All outputs, VCC 4.5 V, TA = +25°C | 5 |
| Low Level Output Voltage, all outputs | VOL |  |  | 0.1 | V | IOL = 20μA, All outputs, VCC 4.5 V, TA = -40°C to +125°C | 5 |
| Low Level Output Voltage, Q7S output | VOL |  | 0.15 | 0.26 | V | IOL = 4.0mA, VCC 4.5 V, TA = +25°C | 5 |
| Low Level Output Voltage, Q7S output | VOL |  |  | 0.4 | V | IOL = 4.0mA, VCC 4.5 V, TA = -40°C to +125°C | 5 |
| Low Level Output Voltage, Qn bus outputs | VOL |  | 0.16 | 0.26 | V | IOL = 6.0mA, VCC 4.5 V, TA = +25°C | 5 |
| Low Level Output Voltage, Qn bus outputs | VOL |  |  | 0.4 | V | IOL = 6.0mA, VCC 4.5 V, TA = -40°C to +125°C | 5 |
| Input Current | II | -0.1 |  | 0.1 | μA | VI = GND to 5.5 V, VCC 5.5 V, TA = +25°C | 5 |
| Input Current | II | -1 |  | 1 | μA | VI = GND to 5.5 V, VCC 5.5 V, TA = -40°C to +125°C | 5 |
| Supply Current | ICC |  |  | 8 | μA | VI = GND or VCC, IO=0, VCC 5.5 V, TA = +25°C | 5 |
| Supply Current | ICC |  |  | 160 | μA | VI = GND or VCC, IO=0, VCC 5.5 V, TA = -40°C to +125°C | 5 |
| Additional Supply Current, pins SHCP, SHST, SHR, STR | ICC |  | 100 | 240 | μA | Per pin, VI = VCC-2.1 V, other pins VI = VCC or GND, IO=0, VCC 4.5 V to 5.5 V, TA = +25°C | 5 |
| Additional Supply Current, pins SHCP, SHST, SHR, STR | ICC |  |  | 300 | μA | Per pin, VI = VCC-2.1 V, other pins VI = VCC or GND, IO=0, VCC 4.5 V to 5.5 V, TA = -40°C to +125°C | 5 |
| Additional Supply Current, pin DS | ICC |  | 75 | 120 | μA | Per pin, VI = VCC-2.1 V, other pins VI = VCC or GND, IO=0, VCC 4.5 V to 5.5 V, TA = +25°C | 5 |
| Additional Supply Current, pin DS | ICC |  |  | 150 | μA | Per pin, VI = VCC-2.1 V, other pins VI = VCC or GND, IO=0, VCC 4.5 V to 5.5 V, TA = -40°C to +125°C | 5 |
| Input Capacitance | Ci |  | 3.5 | 10 | pF | VI = VCC or GND, VCC 5.5 V, TA = +25°C | 5 |
| Input Capacitance | Ci |  |  | 10 | pF | VI = VCC or GND, VCC 5.5 V, TA = -40°C to +125°C | 5 |
| Maximum Frequency, SHCP or STCP | fMAX | 30 | 92 |  | MHz | Figure 2, CL=15pF, VCC 5.0 V, TA = +25°C | 6 |
| Maximum Frequency, SHCP or STCP | fMAX | 20 |  |  | MHz | Figure 2, CL=15pF, VCC 5.0 V, TA = -40°C to +125°C | 6 |
| Pulse Width, SHCP HIGH or LOW | tW | 16 | 4 |  | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = +25°C | 6 |
| Pulse Width, SHCP HIGH or LOW | tW | 24 |  |  | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = -40°C to +125°C | 6 |
| Set-up Time, DS to SHCP | tSU | 20 | 4 |  | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = +25°C | 6 |
| Set-up Time, DS to SHCP | tSU | 30 |  |  | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = -40°C to +125°C | 6 |
| Propagation Delay, STCP to Qn | tPD |  | 18 | 32 | ns | Figure 2, CL=50p, VCC 4.5 V, TA = +25°C | 6 |
| Propagation Delay, STCP to Qn | tPD |  |  | 48 | ns | Figure 2, CL=50p, VCC 4.5 V, TA = -40°C to +125°C | 6 |
| Propagation Delay, STR to Qn | tPHL |  | 17 | 30 | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = +25°C | 7 |
| Propagation Delay, STR to Qn | tPHL |  |  | 45 | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = -40°C to +125°C | 7 |
| Transition Time, serial data output Q7S | tTHL |  | 7 | 15 | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = +25°C | 7 |
| Transition Time, serial data output Q7S | tTHL |  |  | 22 | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = -40°C to +125°C | 7 |
| Transition Time, parallel data outputs Qn | tTLH |  | 5 | 12 | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = +25°C | 7 |
| Transition Time, parallel data outputs Qn | tTLH |  |  | 18 | ns | Figure 2, CL=50pF, VCC 4.5 V, TA = -40°C to +125°C | 7 |

## CAD (KiCad official)

- Symbol: `74HCT594S16-13`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `74hct594s16-13-etched.step` / `74hct594s16-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hct594s16-13.step` / `74hct594s16-13.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/74HCT594S16-13.pdf) (12 pp, sha256 `22a204471f63332d`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hct594s16-13-datasheet.pdf)