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Contents

README

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74HCT4067PW-Q100J

Nexperia · Analog Switches, Multiplexers · TSSOP-24

74HCT4067PW-Q100J from Nexperia, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Z passive Common analog input/output of the SP16T switch; switch current is limited to ±25 mA (ISW) per the limiting values.
2 Y7 passive Independent analog input/output channel 7, selected when E is LOW and S3..S0 = 0111; switch current is limited to ±25 mA.
3 Y6 passive Independent analog input/output channel 6, selected when E is LOW and S3..S0 = 0110; switch current is limited to ±25 mA.
4 Y5 passive Independent analog input/output channel 5, selected when E is LOW and S3..S0 = 0101; switch current is limited to ±25 mA.
5 Y4 passive Independent analog input/output channel 4, selected when E is LOW and S3..S0 = 0100; switch current is limited to ±25 mA.
6 Y3 passive Independent analog input/output channel 3, selected when E is LOW and S3..S0 = 0011; switch current is limited to ±25 mA.
7 Y2 passive Independent analog input/output channel 2, selected when E is LOW and S3..S0 = 0010; switch current is limited to ±25 mA.
8 Y1 passive Independent analog input/output channel 1, selected when E is LOW and S3..S0 = 0001; switch current is limited to ±25 mA.
9 Y0 passive Independent analog input/output channel 0, selected when E is LOW and S3..S0 = 0000; switch current is limited to ±25 mA.
10 S0 input Address input bit 0 (least significant) selecting the channel per the function table; CMOS level on 74HC4067-Q100 and TTL level on 74HCT4067-Q100.
11 S1 input Address input bit 1 selecting the channel per the function table; CMOS level on 74HC4067-Q100 and TTL level on 74HCT4067-Q100.
12 GND power_in Ground (0 V) reference for all voltages in the datasheet.
13 S3 input Address input bit 3 (most significant) selecting the channel per the function table; CMOS level on 74HC4067-Q100 and TTL level on 74HCT4067-Q100.
14 S2 input Address input bit 2 selecting the channel per the function table; CMOS level on 74HC4067-Q100 and TTL level on 74HCT4067-Q100.
15 E input Active-LOW enable input; when HIGH all switches are turned off, and TTL level on 74HCT4067-Q100.
16 Y15 passive Independent analog input/output channel 15, selected when E is LOW and S3..S0 = 1111; switch current is limited to ±25 mA.
17 Y14 passive Independent analog input/output channel 14, selected when E is LOW and S3..S0 = 1110; switch current is limited to ±25 mA.
18 Y13 passive Independent analog input/output channel 13, selected when E is LOW and S3..S0 = 1101; switch current is limited to ±25 mA.
19 Y12 passive Independent analog input/output channel 12, selected when E is LOW and S3..S0 = 1100; switch current is limited to ±25 mA.
20 Y11 passive Independent analog input/output channel 11, selected when E is LOW and S3..S0 = 1011; switch current is limited to ±25 mA.
21 Y10 passive Independent analog input/output channel 10, selected when E is LOW and S3..S0 = 1010; switch current is limited to ±25 mA.
22 Y9 passive Independent analog input/output channel 9, selected when E is LOW and S3..S0 = 1001; switch current is limited to ±25 mA.
23 Y8 passive Independent analog input/output channel 8, selected when E is LOW and S3..S0 = 1000; switch current is limited to ±25 mA.
24 VCC power_in Supply voltage; the wide operating range is 2.0 V to 10.0 V and the absolute maximum is −0.5 V to +11.0 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-24
Category Interface
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC (recommended) VCC 4.5 5 5.5 V 7
Ambient temperature Tamb (recommended) Tamb -40 25 125 °C 7
Input transition rise and fall rate Δt/ΔV 1.67 139 ns VCC = 4.5 V 7
Supply voltage VCC VCC -0.5 11 V 6
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 6
Switch clamping current ISK -20 20 mA VSW < -0.5 V or VSW > VCC + 0.5 V 6
Switch current ISW -25 25 mA VSW = -0.5 V to VCC + 0.5 V 6
Supply current ICC 50 mA 6
Ground current IGND -50 mA 6
Storage temperature Tstg -65 150 °C 6
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 6
Power dissipation per switch P 100 mW 6
HIGH-level input voltage VIH 2 1.6 V Tamb = 25 °C; VCC = 4.5 V to 5.5 V 10
LOW-level input voltage VIL 1.2 0.8 V Tamb = 25 °C; VCC = 4.5 V to 5.5 V 10
Input leakage current II -0.1 0.1 μA Tamb = 25 °C; VI = VCC or GND; VCC = 5.5 V 10
OFF-state leakage current per channel IS(OFF) -0.1 0.1 μA Tamb = 25 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 8; per channel 10
OFF-state leakage current all channels IS(OFF) -0.8 0.8 μA Tamb = 25 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 8; all channels 10
ON-state leakage current IS(ON) -0.8 0.8 μA Tamb = 25 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 9 10
Supply current ICC 8 μA Tamb = 25 °C; VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V 10
Additional supply current, pin E ΔICC 60 216 μA Tamb = 25 °C; per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; pin E 10
Additional supply current, pin Sn ΔICC 50 180 μA Tamb = 25 °C; per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; pin Sn 10
HIGH-level input voltage VIH 2 V Tamb = -40 °C to +85 °C; VCC = 4.5 V to 5.5 V 10
LOW-level input voltage VIL 0.8 V Tamb = -40 °C to +85 °C; VCC = 4.5 V to 5.5 V 10
Input leakage current II -1 1 μA Tamb = -40 °C to +85 °C; VI = VCC or GND; VCC = 5.5 V 10
OFF-state leakage current per channel IS(OFF) -1 1 μA Tamb = -40 °C to +85 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 8; per channel 10
OFF-state leakage current all channels IS(OFF) -8 8 μA Tamb = -40 °C to +85 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 8; all channels 10
ON-state leakage current IS(ON) -8 8 μA Tamb = -40 °C to +85 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 9 10
Supply current ICC 80 μA Tamb = -40 °C to +85 °C; VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V 10
Additional supply current, pin E ΔICC 270 μA Tamb = -40 °C to +85 °C; per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; pin E 10
Additional supply current, pin Sn ΔICC 225 μA Tamb = -40 °C to +85 °C; per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; pin Sn 10
HIGH-level input voltage VIH 2 V Tamb = -40 °C to +125 °C; VCC = 4.5 V to 5.5 V 11
LOW-level input voltage VIL 0.8 V Tamb = -40 °C to +125 °C; VCC = 4.5 V to 5.5 V 11
Input leakage current II -1 1 μA Tamb = -40 °C to +125 °C; VI = VCC or GND; VCC = 5.5 V 11
OFF-state leakage current per channel IS(OFF) -1 1 μA Tamb = -40 °C to +125 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 8; per channel 11
OFF-state leakage current all channels IS(OFF) -8 8 μA Tamb = -40 °C to +125 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 8; all channels 11
ON-state leakage current IS(ON) -8 8 μA Tamb = -40 °C to +125 °C; VCC = 5.5 V; VI = VIH or VIL; /VSW/ = VCC - GND; see Fig. 9 11
Supply current ICC 160 μA Tamb = -40 °C to +125 °C; VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND; VCC = 4.5 V to 5.5 V 11
Additional supply current, pin E ΔICC 294 μA Tamb = -40 °C to +125 °C; per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; pin E 11
Additional supply current, pin Sn ΔICC 245 μA Tamb = -40 °C to +125 °C; per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; pin Sn 11
ON resistance (peak) RON(peak) 110 180 Ω Tamb = 25 °C; Vis = VCC to GND; VCC = 4.5 V; ISW = 1000 μA 7
ON resistance (peak) RON(peak) 225 Ω Tamb = -40 °C to +85 °C; Vis = VCC to GND; VCC = 4.5 V; ISW = 1000 μA 7
ON resistance (peak) RON(peak) 270 Ω Tamb = -40 °C to +125 °C; Vis = VCC to GND; VCC = 4.5 V; ISW = 1000 μA 7
ON resistance (rail) RON(rail) 90 160 Ω Tamb = 25 °C; Vis = GND or VCC; VCC = 4.5 V; ISW = 1000 μA 7
ON resistance (rail) RON(rail) 200 Ω Tamb = -40 °C to +85 °C; Vis = GND or VCC; VCC = 4.5 V; ISW = 1000 μA 7
ON resistance (rail) RON(rail) 240 Ω Tamb = -40 °C to +125 °C; Vis = GND or VCC; VCC = 4.5 V; ISW = 1000 μA 7
Propagation delay Yn to Z tpd 9 15 ns Tamb = 25 °C; Yn to Z; VCC = 4.5 V; see Fig. 10; CL = 50 pF 14
Propagation delay Z to Yn tpd 6 12 ns Tamb = 25 °C; Z to Yn; VCC = 4.5 V; see Fig. 10; CL = 50 pF 14
Turn-off time E to Yn toff 26 55 ns Tamb = 25 °C; E to Yn; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-off time Sn to Yn toff 31 55 ns Tamb = 25 °C; Sn to Yn; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-off time E to Z toff 30 60 ns Tamb = 25 °C; E to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-off time Sn to Z toff 35 60 ns Tamb = 25 °C; Sn to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-on time E to Yn ton 32 60 ns Tamb = 25 °C; E to Yn; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-on time Sn to Yn ton 35 60 ns Tamb = 25 °C; Sn to Yn; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-on time E to Z ton 38 65 ns Tamb = 25 °C; E to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-on time Sn to Z ton 38 65 ns Tamb = 25 °C; Sn to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Propagation delay Yn to Z tpd 22 ns Tamb = -40 °C to +125 °C; Yn to Z; VCC = 4.5 V; see Fig. 10; CL = 50 pF 14
Propagation delay Z to Yn tpd 18 ns Tamb = -40 °C to +125 °C; Z to Yn; VCC = 4.5 V; see Fig. 10; CL = 50 pF 14
Turn-off time E to Z toff 90 ns Tamb = -40 °C to +125 °C; E to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-on time E to Z ton 98 ns Tamb = -40 °C to +125 °C; E to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14
Turn-on time Sn to Z ton 98 ns Tamb = -40 °C to +125 °C; Sn to Z; VCC = 4.5 V; see Fig. 11; CL = 50 pF 14

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin pin Sn - 50 180 μA input capacitance - 3.5 - pF 10

CAD (KiCad official)

  • Symbol: 74HCT4067PW-Q100J
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: 74hct4067pw-q100j-etched.step / 74hct4067pw-q100j-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct4067pw-q100j.step / 74hct4067pw-q100j.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (24 pp, sha256 0b90ad9ab2d19180, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF