# 74HCT3G34DP

**Nexperia** · Buffers, Drivers, Receivers, Transceivers · TSSOP-8

74HCT3G34DP from Nexperia, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input 1A; inputs include clamp diodes so current-limiting resistors can be used to interface voltages above VCC, with input voltage specified from 0 V to VCC. |
| 2 | 3Y | output | Data output 3Y; output voltage is specified from 0 V to VCC and output current is limited to ±25 mA. |
| 3 | 2A | input | Data input 2A; inputs include clamp diodes so current-limiting resistors can be used to interface voltages above VCC, with input voltage specified from 0 V to VCC. |
| 4 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 5 | 2Y | output | Data output 2Y; output voltage is specified from 0 V to VCC and output current is limited to ±25 mA. |
| 6 | 3A | input | Data input 3A; inputs include clamp diodes so current-limiting resistors can be used to interface voltages above VCC, with input voltage specified from 0 V to VCC. |
| 7 | 1Y | output | Data output 1Y; output voltage is specified from 0 V to VCC and output current is limited to ±25 mA. |
| 8 | VCC | power_in | Supply voltage: 2.0 V to 6.0 V for 74HC3G34 and 4.5 V to 5.5 V for 74HCT3G34 (absolute maximum 7.0 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-8 |
| Category | Logic |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage (recommended) | VCC | 4.5 | 5 | 5.5 | V |  | 3 |
| input voltage (recommended) | VI | 0 |  |  | V |  | 3 |
| output voltage (recommended) | VO | 0 |  |  | V |  | 3 |
| ambient temperature | Tamb | -40 | 25 | 125 | °C |  | 3 |
| input transition rise and fall rate | Δt/ΔV |  | 1.67 | 139 | ns/V | VCC = 4.5 V | 3 |
| supply voltage | VCC | -0.5 |  | 7 | V |  | 3 |
| input clamping current | IIK | -20 |  | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 |
| output clamping current | IOK | -20 |  | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 |
| output current | IO | -25 |  | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 3 |
| quiescent supply current | ICC |  |  | 50 | mA |  | 3 |
| ground current | IGND | -50 |  |  | mA |  | 3 |
| storage temperature | Tstg | -65 |  | 150 | °C |  | 3 |
| total power dissipation | Ptot |  |  | 250 | mW | Tamb = -40 °C to +125 °C | 3 |
| HIGH-level input voltage | VIH | 2 | 1.6 |  | V | VCC = 4.5 V to 5.5 V; Tamb = -40 °C to +125 °C | 5 |
| LOW-level input voltage | VIL |  | 1.2 | 0.8 | V | VCC = 4.5 V to 5.5 V; Tamb = -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 |  | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 3.7 | 4.32 |  | V | VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL |  | 0 | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL |  | 0.15 | 0.4 | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 5 |
| input leakage current | II | -1 |  | 1 | μA | VI = VCC or GND; VCC = 5.5 V; Tamb = -40 °C to +125 °C | 5 |
| supply current | ICC |  |  | 20 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb = -40 °C to +125 °C | 5 |
| additional supply current | ΔICC |  |  | 410 | μA | per input; VCC = 4.5 V to 5.5 V; VI = VCC - 2.1 V; IO = 0 A; Tamb = -40 °C to +125 °C | 5 |
| propagation delay | tpd |  | 10 | 29 | ns | nA to nY; see Fig. 3; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 6 |
| transition time | tt |  | 6 | 25 | ns | nY; VCC = 4.5 V; see Fig. 3; Tamb = -40 °C to +125 °C | 6 |
| input capacitance | CI |  | 1.5 |  | pF |  | 5 |
| power dissipation capacitance | CPD |  | 9 |  | pF | VI = GND to VCC - 1.5 V | 6 |

## CAD (KiCad official)

- Symbol: `74HCT3G34DP`
- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`
- 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `74hct3g34dp-etched.step` / `74hct3g34dp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hct3g34dp.step` / `74hct3g34dp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914549638770688) (12 pp, sha256 `5d8a993cccd95483`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hct3g34dp-datasheet.pdf)