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74HCT373D

Nexperia · Latches · SOIC-20-300mil

74HCT373D from Nexperia, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input 3-state output enable input (active LOW); a HIGH level puts the outputs in the high-impedance OFF-state without affecting the latches.
2 Q0 tri_state 3-state latch output 0.
3 D0 input Data input 0.
4 D1 input Data input 1.
5 Q1 tri_state 3-state latch output 1.
6 Q2 tri_state 3-state latch output 2.
7 D2 input Data input 2.
8 D3 input Data input 3.
9 Q3 tri_state 3-state latch output 3.
10 GND power_in Ground (0 V).
11 LE input Latch enable input (active HIGH); latches are transparent when HIGH and store data when LOW.
12 Q4 tri_state 3-state latch output 4.
13 D4 input Data input 4.
14 D5 input Data input 5.
15 Q5 tri_state 3-state latch output 5.
16 Q6 tri_state 3-state latch output 6.
17 D6 input Data input 6.
18 D7 input Data input 7.
19 Q7 tri_state 3-state latch output 7.
20 VCC power_in Supply voltage; 4.5 V to 5.5 V recommended for 74HCT373.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-20-300mil
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Output current IO -35 35 mA VO = -0.5 V to (VCC + 0.5 V) 4
Supply current ICC 70 mA 4
Ground current IGND -70 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW SO20: derates linearly with 12.3 mW/K above 109 °C 4
Supply voltage VCC 4.5 5 5.5 V 74HCT373 5
Input voltage VI 0 V max = VCC 5
Output voltage VO 0 V max = VCC 5
Ambient temperature Tamb -40 25 125 °C 5
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 5
HIGH-level input voltage VIH 2 1.6 V VCC = 4.5 V to 5.5 V; Tamb = 25 °C 6
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; Tamb = -40 °C to 125 °C 6
LOW-level input voltage VIL 1.2 0.8 V VCC = 4.5 V to 5.5 V; Tamb = 25 °C 6
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; Tamb = -40 °C to 125 °C 6
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; Tamb = 25 °C 6
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; Tamb = -40 °C to 125 °C 6
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; Tamb = 25 °C 6
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; Tamb = -40 °C to 125 °C 6
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; Tamb = 25 °C 6
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; Tamb = -40 °C to 125 °C 6
LOW-level output voltage VOL 0.16 0.26 V VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; Tamb = 25 °C 6
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; Tamb = -40 °C to 125 °C 6
Input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 5.5 V; Tamb = 25 °C 6
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 5.5 V; Tamb = -40 °C to 125 °C 6
OFF-state output current IOZ -0.5 0.5 μA VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND; Tamb = 25 °C 6
OFF-state output current IOZ -10 10 μA VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND; Tamb = -40 °C to 125 °C 6
Supply current ICC 8 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb = 25 °C 6
Supply current ICC 160 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb = -40 °C to 125 °C 6
Additional supply current, Dn ΔICC 30 108 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; Tamb = 25 °C 6
Additional supply current, Dn ΔICC 147 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; Tamb = -40 °C to 125 °C 6
Additional supply current, LE ΔICC 150 540 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; Tamb = 25 °C 6
Additional supply current, LE ΔICC 735 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; Tamb = -40 °C to 125 °C 6
Additional supply current, OE ΔICC 100 360 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; Tamb = 25 °C 6
Additional supply current, OE ΔICC 490 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; Tamb = -40 °C to 125 °C 6
Propagation delay Dn to Qn tpd 17 30 ns VCC = 4.5 V; CL = 50 pF; Tamb = 25 °C 7
Propagation delay Dn to Qn tpd 45 ns VCC = 4.5 V; CL = 50 pF; Tamb = -40 °C to 125 °C 7
Propagation delay LE to Qn tpd 16 32 ns VCC = 4.5 V; CL = 50 pF; Tamb = 25 °C 7
Propagation delay LE to Qn tpd 48 ns VCC = 4.5 V; CL = 50 pF; Tamb = -40 °C to 125 °C 7
Enable time OE to Qn ten 19 32 ns VCC = 4.5 V; Tamb = 25 °C 7
Enable time OE to Qn ten 48 ns VCC = 4.5 V; Tamb = -40 °C to 125 °C 7
Disable time OE to Qn tdis 18 30 ns VCC = 4.5 V; Tamb = 25 °C 7
Disable time OE to Qn tdis 45 ns VCC = 4.5 V; Tamb = -40 °C to 125 °C 7
Transition time Qn tt 5 12 ns VCC = 4.5 V; Tamb = 25 °C 7
Transition time Qn tt 18 ns VCC = 4.5 V; Tamb = -40 °C to 125 °C 7
Pulse width LE HIGH tW 16 4 ns VCC = 4.5 V; Tamb = 25 °C 8
Pulse width LE HIGH tW 24 ns VCC = 4.5 V; Tamb = -40 °C to 125 °C 8
Set-up time Dn to LE tsu 12 6 ns VCC = 4.5 V; Tamb = 25 °C 8
Set-up time Dn to LE tsu 18 ns VCC = 4.5 V; Tamb = -40 °C to 125 °C 8
Hold time Dn to LE th 4 -1 ns VCC = 4.5 V; Tamb = 25 °C 8
Hold time Dn to LE th 4 ns VCC = 4.5 V; Tamb = -40 °C to 125 °C 8
Input capacitance CI 3.5 pF Tamb = 25 °C 6
Power dissipation capacitance CPD 41 pF per latch; VI = GND to (VCC - 1.5 V) 8

CAD (KiCad official)

  • Symbol: 74HCT373D
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: 74hct373d-etched.step / 74hct373d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct373d.step / 74hct373d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 694e57b88d55eac3, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF