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74HCT32PW

Public Made by Adom

by adom

Nexperia Logic ICs, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HCT32PW

Nexperia · Logic ICs · TSSOP-14

74HCT32PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input 1A of the first OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
2 1B input Data input 1B of the first OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
3 1Y output Data output 1Y of the first OR gate; output current is limited to ±25 mA per the limiting values.
4 2A input Data input 2A of the second OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
5 2B input Data input 2B of the second OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
6 2Y output Data output 2Y of the second OR gate; output current is limited to ±25 mA per the limiting values.
7 GND power_in Ground (0 V) reference for all voltages in the datasheet.
8 3Y output Data output 3Y of the third OR gate; output current is limited to ±25 mA per the limiting values.
9 3A input Data input 3A of the third OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
10 3B input Data input 3B of the third OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
11 4Y output Data output 4Y of the fourth OR gate; output current is limited to ±25 mA per the limiting values.
12 4A input Data input 4A of the fourth OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
13 4B input Data input 4B of the fourth OR gate; input voltage must stay between 0 V and VCC per the recommended operating conditions.
14 VCC power_in Supply voltage; 2.0 V to 6.0 V for 74HC32 and 4.5 V to 5.5 V for 74HCT32 per the recommended operating conditions, with absolute maximum -0.5 V to +7 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC 4.5 5 5.5 V 3
ambient temperature Tamb -40 125 °C 3
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 3
supply voltage VCC -0.5 7 V 3
input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 3
output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 3
output current IO -25 25 mA -0.5 V < VO < VCC + 0.5 V 3
supply current ICC 50 mA 3
ground current IGND -50 mA 3
storage temperature Tstg -65 150 °C 3
total power dissipation Ptot 500 mW 3
HIGH-level input voltage VIH 2 1.6 V VCC = 4.5 V to 5.5 V; 25 °C 4
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 4
LOW-level input voltage VIL 1.2 0.8 V VCC = 4.5 V to 5.5 V; 25 °C 4
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 4
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; 25 °C 4
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; -40 °C to +125 °C 4
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; 25 °C 4
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; -40 °C to +125 °C 4
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; 25 °C 4
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; -40 °C to +125 °C 4
LOW-level output voltage VOL 0.15 0.25 V VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; 25 °C 4
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; -40 °C to +125 °C 4
input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 5.5 V; 25 °C 4
input leakage current II -1 1 μA VI = VCC or GND; VCC = 5.5 V; -40 °C to +125 °C 5
supply current ICC 2 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 5
supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 5
additional supply current ΔICC 430 μA per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; 25 °C 5
additional supply current ΔICC 590 μA per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
input capacitance CI 3.5 pF 5
propagation delay tpd 11 24 ns VCC = 4.5 V; see Fig. 6; 25 °C 5
propagation delay tpd 36 ns VCC = 4.5 V; see Fig. 6; -40 °C to +125 °C 5
transition time tt 7 15 ns VCC = 4.5 V; see Fig. 6; 25 °C 5
transition time tt 22 ns VCC = 4.5 V; see Fig. 6; -40 °C to +125 °C 5
power dissipation capacitance CPD 28 pF per package; VI = GND to VCC - 1.5 V 5

CAD (KiCad official)

  • Symbol: 74HCT32PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74hct32pw-etched.step / 74hct32pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct32pw.step / 74hct32pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 4e7b31a6e51ab80c, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF