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74HCT32D

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Nexperia Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HCT32D

Nexperia · Logic Gates · SOIC-14

74HCT32D from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input 1A of gate 1; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
2 1B input Data input 1B of gate 1; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
3 1Y output Data output 1Y of gate 1, the logic OR of 1A and 1B; output current limited to ±25 mA.
4 2A input Data input 2A of gate 2; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
5 2B input Data input 2B of gate 2; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
6 2Y output Data output 2Y of gate 2, the logic OR of 2A and 2B; output current limited to ±25 mA.
7 GND power_in Ground (0 V) reference for all voltages on the device.
8 3Y output Data output 3Y of gate 3, the logic OR of 3A and 3B; output current limited to ±25 mA.
9 3A input Data input 3A of gate 3; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
10 3B input Data input 3B of gate 3; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
11 4Y output Data output 4Y of gate 4, the logic OR of 4A and 4B; output current limited to ±25 mA.
12 4A input Data input 4A of gate 4; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
13 4B input Data input 4B of gate 4; inputs include clamp diodes, so a current-limiting resistor can be used when the input is driven above VCC (input clamp current limited to ±20 mA).
14 VCC power_in Supply voltage; recommended 4.5 V to 5.5 V for the 74HCT32 (absolute maximum -0.5 V to +7 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5 5.5 V 3
Input voltage VI 0 V 0 to VCC 3
Output voltage VO 0 V 0 to VCC 3
Ambient temperature Tamb -40 125 °C 3
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 3
HIGH-level input voltage VIH 2 1.6 V VCC = 4.5 V to 5.5 V; 25 °C 4
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 4
LOW-level input voltage VIL 1.2 0.8 V VCC = 4.5 V to 5.5 V; 25 °C 4
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 4
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; 25 °C 4
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; -40 °C to +85 °C 4
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; 25 °C 4
HIGH-level output voltage VOH 3.84 V VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +85 °C 4
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 4
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; 25 °C 4
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; -40 °C to +85 °C 4
LOW-level output voltage VOL 0.15 0.25 V VI = VIH or VIL; IO = 5.2 mA; VCC = 4.5 V; 25 °C 4
LOW-level output voltage VOL 0.33 V VI = VIH or VIL; IO = 5.2 mA; VCC = 4.5 V; -40 °C to +85 °C 4
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 5.2 mA; VCC = 4.5 V; -40 °C to +125 °C 4
Input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 5.5 V; 25 °C 5
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 5.5 V; -40 °C to +85 °C 5
Supply current ICC 2 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 5
Supply current ICC 20 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +85 °C 5
Supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 5
Additional supply current ΔICC 430 μA per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; 25 °C 5
Additional supply current ΔICC 540 μA per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 5
Additional supply current ΔICC 590 μA per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
Propagation delay tpd 11 24 ns nA, nB to nY; see Fig. 6; VCC = 4.5 V; 25 °C 5
Propagation delay tpd 30 ns nA, nB to nY; see Fig. 6; VCC = 4.5 V; -40 °C to +85 °C 5
Propagation delay tpd 36 ns nA, nB to nY; see Fig. 6; VCC = 4.5 V; -40 °C to +125 °C 5
Transition time tt 7 15 ns VCC = 4.5 V; see Fig. 6; 25 °C 5
Transition time tt 19 ns VCC = 4.5 V; see Fig. 6; -40 °C to +85 °C 5
Transition time tt 22 ns VCC = 4.5 V; see Fig. 6; -40 °C to +125 °C 5
Supply voltage VCC -0.5 7 V 3
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 3
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 3
Output current IO -25 25 mA -0.5 V < VO < VCC + 0.5 V 3
Supply current ICC 50 mA 3
Ground current IGND -50 mA 3
Storage temperature Tstg -65 150 °C 3
Total power dissipation Ptot 500 mW SOT108-1 (SO14); derates linearly 10.1 mW/K above 100 °C 3

CAD (KiCad official)

  • Symbol: 74HCT32D
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: 74hct32d-etched.step / 74hct32d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct32d.step / 74hct32d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 4e7b31a6e51ab80c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF