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74HCT30D

Public Made by Adom

by adom

Nexperia Logic Gates, SO-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HCT30D

Nexperia · Logic Gates · SO-14

74HCT30D from Nexperia, in a SO-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
2 B input Data input B of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
3 C input Data input C of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
4 D input Data input D of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
5 E input Data input E of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
6 F input Data input F of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
7 GND power_in Ground (0 V); all voltages are referenced to this pin.
8 Y output Data output of the NAND gate; it is HIGH unless all eight inputs are HIGH.
9 n.c. unconnected Not connected.
10 n.c. unconnected Not connected.
11 G input Data input G of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
12 H input Data input H of the 8-input NAND gate; inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC.
13 n.c. unconnected Not connected.
14 VCC power_in Supply voltage; recommended 2.0 V to 6.0 V for 74HC30 and 4.5 V to 5.5 V for 74HCT30.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SO-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Output current IO -25 25 mA -0.5 V < VO < VCC + 0.5 V 4
Supply current ICC 50 mA 4
Ground current IGND -50 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW 4
Supply voltage (74HCT30) VCC 4.5 5 5.5 V 4
Input voltage VI 0 V 4
Output voltage VO 0 V 4
Ambient temperature Tamb -40 125 °C 4
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 4
HIGH-level input voltage VIH 2 1.6 V VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 1.2 0.8 V VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 3.7 4.32 V VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0.15 0.4 V VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 5.5 V; -40 °C to +125 °C 5
Supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 5
Additional supply current ΔICC 60 294 μA per input pin; VI = VCC - 2.4 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 6
Propagation delay tpd 16 42 ns A, B, C, D, E, F, G, H to Y; see Fig. 5; VCC = 4.5 V; -40 °C to +125 °C 7
Transition time tt 7 22 ns see Fig. 5; VCC = 4.5 V; -40 °C to +125 °C 7
Input capacitance CI 3.5 pF 6
Propagation delay tpd 12 ns VCC = 5.0 V; CL = 15 pF 7
Power dissipation capacitance CPD 15 pF per package; VI = GND to VCC - 1.5 V 7

CAD (KiCad official)

  • Symbol: 74HCT30D
  • Footprint: Package_SO:SO-14_3.9x8.65mm_P1.27mm
  • 3D model: SO-14 (KiCad packages3D, STEP)
  • 3D model files: 74hct30d-etched.step / 74hct30d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct30d.step / 74hct30d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 461f481b50017bf4, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF