component
74HCT273PW
Public Made by Adomby adom
Nexperia Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"brief": "Nexperia Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"pins": [
{
"number": "1",
"name": "MR",
"type": "input",
"description": "Master reset input (active LOW); a LOW forces all outputs Qn LOW independently of the clock and data inputs."
},
{
"number": "2",
"name": "Q0",
"type": "output",
"description": "Flip-flop 0 output; takes the state of D0 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
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{
"number": "3",
"name": "D0",
"type": "input",
"description": "Data input for flip-flop 0; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "4",
"name": "D1",
"type": "input",
"description": "Data input for flip-flop 1; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "5",
"name": "Q1",
"type": "output",
"description": "Flip-flop 1 output; takes the state of D1 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
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{
"number": "6",
"name": "Q2",
"type": "output",
"description": "Flip-flop 2 output; takes the state of D2 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
},
{
"number": "7",
"name": "D2",
"type": "input",
"description": "Data input for flip-flop 2; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "8",
"name": "D3",
"type": "input",
"description": "Data input for flip-flop 3; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "9",
"name": "Q3",
"type": "output",
"description": "Flip-flop 3 output; takes the state of D3 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground (0 V) reference for all voltages."
},
{
"number": "11",
"name": "CP",
"type": "input",
"description": "Clock input; edge-triggered on the LOW-to-HIGH transition, at which the Qn outputs take the states of their Dn inputs."
},
{
"number": "12",
"name": "Q4",
"type": "output",
"description": "Flip-flop 4 output; takes the state of D4 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
},
{
"number": "13",
"name": "D4",
"type": "input",
"description": "Data input for flip-flop 4; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "14",
"name": "D5",
"type": "input",
"description": "Data input for flip-flop 5; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "15",
"name": "Q5",
"type": "output",
"description": "Flip-flop 5 output; takes the state of D5 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
},
{
"number": "16",
"name": "Q6",
"type": "output",
"description": "Flip-flop 6 output; takes the state of D6 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
},
{
"number": "17",
"name": "D6",
"type": "input",
"description": "Data input for flip-flop 6; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "18",
"name": "D7",
"type": "input",
"description": "Data input for flip-flop 7; must meet set-up and hold times around the LOW-to-HIGH clock transition, and the inputs include clamp diodes so current-limiting resistors can be used for voltages above VCC."
},
{
"number": "19",
"name": "Q7",
"type": "output",
"description": "Flip-flop 7 output; takes the state of D7 on the LOW-to-HIGH clock transition and is forced LOW while MR is LOW."
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{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage: 2.0 V to 6.0 V for 74HC273 and 4.5 V to 5.5 V for 74HCT273 (recommended operating conditions)."
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"at": "2026-10-18T03:56:02"
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{
"name": "total power dissipation",
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"kind": "absolute_maximum",
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"min": null,
"typ": null,
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"source_page": 4,
"source": "datasheet"
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"kind": "electrical",
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"conditions": "VCC = 4.5 V to 5.5 V; 25 °C",
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"name": "LOW-level output voltage",
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"name": "LOW-level output voltage",
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"conditions": "VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C",
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"name": "additional supply current, MR input",
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"kind": "electrical",
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"typ": 100,
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"conditions": "per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; 25 °C",
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{
"name": "additional supply current, MR input",
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"source": "datasheet"
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{
"name": "additional supply current, CP input",
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{
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