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docs 74hct245pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
74hct245pw-etched.fit.json 74hct245pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74hct245pw-etched.glb 74hct245pw: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 15d ago
74hct245pw-etched.step 74hct245pw: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 15d ago
74hct245pw.glb Publish 0.1.0 · Ray 2mo ago
74hct245pw.kicad_mod Publish 0.1.0 · Ray 2mo ago
74hct245pw.kicad_sym Publish 0.1.0 · Ray 2mo ago
74hct245pw.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
74hct245pw.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json 74hct245pw: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 15d ago
README.md 74hct245pw: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74HCT245PW

Nexperia · Buffer/Driver/Transceiver · TSSOP-20

74HCT245PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Direction control input. LOW = data flows B→A (B ports are inputs, A ports are outputs); HIGH = data flows A→B (A ports are inputs, B ports are outputs). TTL-level input.
2 A0 bidirectional Bidirectional data I/O bit 0 on the A-side bus. Acts as input or 3-state output depending on DIR and OE.
3 A1 bidirectional Bidirectional data I/O bit 1 on the A-side bus.
4 A2 bidirectional Bidirectional data I/O bit 2 on the A-side bus.
5 A3 bidirectional Bidirectional data I/O bit 3 on the A-side bus.
6 A4 bidirectional Bidirectional data I/O bit 4 on the A-side bus.
7 A5 bidirectional Bidirectional data I/O bit 5 on the A-side bus.
8 A6 bidirectional Bidirectional data I/O bit 6 on the A-side bus.
9 A7 bidirectional Bidirectional data I/O bit 7 on the A-side bus.
10 GND power_in Ground reference (0 V). Connect to system ground.
11 B7 bidirectional Bidirectional data I/O bit 7 on the B-side bus.
12 B6 bidirectional Bidirectional data I/O bit 6 on the B-side bus.
13 B5 bidirectional Bidirectional data I/O bit 5 on the B-side bus.
14 B4 bidirectional Bidirectional data I/O bit 4 on the B-side bus.
15 B3 bidirectional Bidirectional data I/O bit 3 on the B-side bus.
16 B2 bidirectional Bidirectional data I/O bit 2 on the B-side bus.
17 B1 bidirectional Bidirectional data I/O bit 1 on the B-side bus.
18 B0 bidirectional Bidirectional data I/O bit 0 on the B-side bus.
19 OE input Output enable, active LOW. LOW enables the transceiver in the direction set by DIR; HIGH places both A and B ports in high-impedance (3-state) OFF condition.
20 VCC power_in Positive supply voltage. Recommended operating range 4.5 V to 5.5 V for 74HCT245 (TTL-input variant); absolute max 7 V. Decouple with a 100 nF ceramic capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-20
Category Logic
Pins 20

Ordering variants

  • 74HCT245PW
  • 74HCT245PWD
  • 74HCT245PWBQ

CAD (KiCad official)

  • Symbol: 74HCT245PW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74hct245pw-etched.step / 74hct245pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct245pw.step / 74hct245pw.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
74hct245pw.step 267 KB You want the bare part, or you mark your own boards.
74hct245pw-etched.step 2.3 MB You want the part with 74HCT245PW already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 610 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 ff2562c806a0fc87, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF