74HCT244PW-Q100 from Nexperia USA Inc., in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). The symbol is generated from that pin table and the footprint is an Adom_Gen land derived from the manufacturer drawing; the 3D model is generated to fit it.

Pinout

Pin	Name	Type	Function
1	1OE	input	Active-LOW output enable for outputs 1Y0 to 1Y3; a HIGH on nOE forces these outputs into the high-impedance OFF-state.
2	1A0	input	Data input for buffer channel 1A0; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
3	2Y0	tri_state	Non-inverting 3-state bus output 2Y0, high-impedance when 2OE is HIGH.
4	1A1	input	Data input for buffer channel 1A1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
5	2Y1	tri_state	Non-inverting 3-state bus output 2Y1, high-impedance when 2OE is HIGH.
6	1A2	input	Data input for buffer channel 1A2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
7	2Y2	tri_state	Non-inverting 3-state bus output 2Y2, high-impedance when 2OE is HIGH.
8	1A3	input	Data input for buffer channel 1A3; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
9	2Y3	tri_state	Non-inverting 3-state bus output 2Y3, high-impedance when 2OE is HIGH.
10	GND	power_in	Ground (0 V) reference for all device voltages; this is the device ground pin.
11	2A3	input	Data input for buffer channel 2A3; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
12	1Y3	tri_state	Non-inverting 3-state bus output 1Y3, high-impedance when 1OE is HIGH.
13	2A2	input	Data input for buffer channel 2A2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
14	1Y2	tri_state	Non-inverting 3-state bus output 1Y2, high-impedance when 1OE is HIGH.
15	2A1	input	Data input for buffer channel 2A1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
16	1Y1	tri_state	Non-inverting 3-state bus output 1Y1, high-impedance when 1OE is HIGH.
17	2A0	input	Data input for buffer channel 2A0; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
18	1Y0	tri_state	Non-inverting 3-state bus output 1Y0, high-impedance when 1OE is HIGH.
19	2OE	input	Active-LOW output enable for outputs 2Y0 to 2Y3; a HIGH on nOE forces these outputs into the high-impedance OFF-state.
20	VCC	power_in	Supply voltage; 4.5 V to 5.5 V for the 74HCT244-Q100 (2.0 V to 6.0 V applies to the 74HC244-Q100 variant).

Key specifications

Parameter	Value
Manufacturer	Nexperia USA Inc.
Package	TSSOP-20
Category	Integrated Circuits (ICs)
Pins	20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VCC supply voltage	VCC	4.5	5	5.5	V		4
input voltage	VI	0			V		4
output voltage	VO	0			V		4
input transition rise and fall rate	Δt/ΔV		1.67	139	ns/V	VCC = 4.5 V	4
ambient temperature	Tamb	-40		125	°C		4
supply voltage	VCC	-0.5		7	V		4
input clamping current	IIK	-20		20	mA	VI < -0.5 V or VI > VCC + 0.5 V	4
output clamping current	IOK	-20		20	mA	VO < -0.5 V or VO > VCC + 0.5 V	4
output current	IO	-35		35	mA	-0.5 V < VO < VCC + 0.5 V	4
supply current	ICC			70	mA		4
ground current	IGND	-70			mA		4
storage temperature	Tstg	-65		150	°C		4
total power dissipation	Ptot			500	mW	[1] For SOT360-1 (TSSOP20): derates linearly with 10.0 mW/K above 100 °C	4
HIGH-level input voltage	VIH	2	1.6		V	VCC = 4.5 V to 5.5 V	6
LOW-level input voltage	VIL		1.2	0.8	V	VCC = 4.5 V to 5.5 V	6
HIGH-level output voltage	VOH	4.4	4.5		V	VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA	6
HIGH-level output voltage	VOH	3.7	4.32		V	VI = VIH or VIL; VCC = 4.5 V; IO = -6 mA	6
LOW-level output voltage	VOL		0	0.1	V	VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA	6
LOW-level output voltage	VOL		0.16	0.4	V	VI = VIH or VIL; VCC = 4.5 V; IO = 6.0 mA	6
input leakage current	II	-1		1	μA	VI = VCC or GND; VCC = 5.5 V	6
OFF-state output current	IOZ	-10		10	μA	VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND	6
supply current	ICC			160	μA	VI = VCC or GND; VCC = 5.5 V; IO = 0 A	6
additional supply current	ΔICC		70	343	μA	per input pin; VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A	6
propagation delay nAn to nYn	tpd		13	33	ns	nAn to nYn; see Fig. 4; VCC = 4.5 V	7
enable time nOE to nYn	ten		15	45	ns	nOE to nYn; VCC = 4.5 V; see Fig. 5	7
disable time nOE to nYn	tdis		15	38	ns	nOE to nYn; VCC = 4.5 V; see Fig. 5	7
transition time	tt		5	18	ns	VCC = 4.5 V; see Fig. 4	7

CAD (Adom-generated)

Symbol: 74HCT244PW-Q100
Footprint: Adom_Gen:Nexperia_USA_Inc._74_453984
3D model: generated to fit the land (STEP)
3D model files: 74hct244pw-q100-etched.step / 74hct244pw-q100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct244pw-q100.step / 74hct244pw-q100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Nexperia USA Inc. datasheet (15 pp, sha256 163e51d59b844afc, retrieved 2026-11-11, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: symbol generated from the datasheet pin table; footprint an Adom_Gen land derived from the manufacturer drawing. 3D model generated to fit that land.

Datasheet PDF

74HCT244PW-Q100

Verified 74HCT244PW-Q100

Verification log 2 records

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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