# 74HCT14D

**Nexperia** · Inverters · SOIC-14

74HCT14D from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of inverter 1; Schmitt-trigger input with clamp diodes, specified for input voltages from 0 V to VCC. |
| 2 | 1Y | output | Data output of inverter 1; output current limited to ±25 mA (Table 4 IO maximum). |
| 3 | 2A | input | Data input of inverter 2; Schmitt-trigger input with clamp diodes, specified for input voltages from 0 V to VCC. |
| 4 | 2Y | output | Data output of inverter 2; output current limited to ±25 mA (Table 4 IO maximum). |
| 5 | 3A | input | Data input of inverter 3; Schmitt-trigger input with clamp diodes, specified for input voltages from 0 V to VCC. |
| 6 | 3Y | output | Data output of inverter 3; output current limited to ±25 mA (Table 4 IO maximum). |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 4Y | output | Data output of inverter 4; output current limited to ±25 mA (Table 4 IO maximum). |
| 9 | 4A | input | Data input of inverter 4; Schmitt-trigger input with clamp diodes, specified for input voltages from 0 V to VCC. |
| 10 | 5Y | output | Data output of inverter 5; output current limited to ±25 mA (Table 4 IO maximum). |
| 11 | 5A | input | Data input of inverter 5; Schmitt-trigger input with clamp diodes, specified for input voltages from 0 V to VCC. |
| 12 | 6Y | output | Data output of inverter 6; output current limited to ±25 mA (Table 4 IO maximum). |
| 13 | 6A | input | Data input of inverter 6; Schmitt-trigger input with clamp diodes, specified for input voltages from 0 V to VCC. |
| 14 | VCC | power_in | Supply voltage; 4.5 V to 5.5 V recommended for 74HCT14 (absolute maximum -0.5 V to +7 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `74HCT14D`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `74hct14d-etched.step` / `74hct14d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hct14d.step` / `74hct14d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8579712011896479744) (16 pp, sha256 `ab7028cdd8c5ce85`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hct14d-datasheet.pdf)