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README

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74HCT139D

Nexperia · Signal Switches, Multiplexers, Decoders · SO-16

74HCT139D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1E input Active-LOW enable input for decoder 1; when it is HIGH, all outputs 1Y0 to 1Y3 are forced HIGH.
2 1A0 input Address input bit 0 for decoder 1 (binary weight 1), which selects one of outputs 1Y0 to 1Y3.
3 1A1 input Address input bit 1 for decoder 1 (binary weight 2), which selects one of outputs 1Y0 to 1Y3.
4 1Y0 output Active-LOW mutually exclusive output 0 of decoder 1, LOW when nE is LOW and nA1 nA0 = 00.
5 1Y1 output Active-LOW mutually exclusive output 1 of decoder 1, LOW when nE is LOW and nA1 nA0 = 01.
6 1Y2 output Active-LOW mutually exclusive output 2 of decoder 1, LOW when nE is LOW and nA1 nA0 = 10.
7 1Y3 output Active-LOW mutually exclusive output 3 of decoder 1, LOW when nE is LOW and nA1 nA0 = 11.
8 GND power_in Ground (0 V) reference for all voltages on the device.
9 2Y3 output Active-LOW mutually exclusive output 3 of decoder 2, LOW when 2E is LOW and 2A1 2A0 = 11.
10 2Y2 output Active-LOW mutually exclusive output 2 of decoder 2, LOW when 2E is LOW and 2A1 2A0 = 10.
11 2Y1 output Active-LOW mutually exclusive output 1 of decoder 2, LOW when 2E is LOW and 2A1 2A0 = 01.
12 2Y0 output Active-LOW mutually exclusive output 0 of decoder 2, LOW when 2E is LOW and 2A1 2A0 = 00.
13 2A1 input Address input bit 1 for decoder 2 (binary weight 2), which selects one of outputs 2Y0 to 2Y3.
14 2A0 input Address input bit 0 for decoder 2 (binary weight 1), which selects one of outputs 2Y0 to 2Y3.
15 2E input Active-LOW enable input for decoder 2; when it is HIGH, all outputs 2Y0 to 2Y3 are forced HIGH.
16 VCC power_in Positive supply voltage; the 74HCT139 recommended range is 4.5 V to 5.5 V with respect to GND.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SO-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Output current IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 4
Quiescent supply current ICC 50 mA 4
Ground current IGND -50 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW SOT109-1 (SO16): derates linearly 12.4 mW/K above 110 °C 4
Supply voltage VCC 4.5 5 5.5 V 74HCT139 column 4
Input voltage VI 0 V 4
Output voltage VO 0 V 4
Ambient temperature Tamb -40 25 125 °C 4
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 4
HIGH-level input voltage VIH 2 1.6 V VCC = 4.5 V to 5.5 V; 25 °C 5
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 1.2 0.8 V VCC = 4.5 V to 5.5 V; 25 °C 5
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; 25 °C 5
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; IO = -4 mA; VCC = 4.5 V; 25 °C 5
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -4 mA; VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; 25 °C 5
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0.15 0.26 V VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; 25 °C 5
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
Input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 5.5 V; 25 °C 5
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 5.5 V; -40 °C to +125 °C 5
OFF-state output current IOZ -0.5 0.5 μA VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V; 25 °C 6
OFF-state output current IOZ -10 10 μA VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V; -40 °C to +125 °C 6
Supply current ICC 8 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 6
Supply current ICC 160 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 6
Additional supply current per input pin (1An inputs) ΔICC 70 252 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; 25 °C 6
Additional supply current per input pin (1An inputs) ΔICC 343 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; -40 °C to +125 °C 6
Additional supply current per input pin (2An inputs) ΔICC 70 252 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; 25 °C 6
Additional supply current per input pin (2An inputs) ΔICC 343 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; -40 °C to +125 °C 6
Additional supply current per input pin (nE inputs) ΔICC 135 486 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; 25 °C 6
Additional supply current per input pin (nE inputs) ΔICC 661.5 μA VI = VCC - 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A; -40 °C to +125 °C 6
Propagation delay nAn to Yn tpd 16 34 ns nAn to Yn; see Fig. 5; VCC = 4.5 V; CL = 50 pF; 25 °C 7
Propagation delay nAn to Yn tpd 51 ns nAn to Yn; see Fig. 5; VCC = 4.5 V; CL = 50 pF; -40 °C to +125 °C 7
Propagation delay nE to nYn tpd 16 34 ns nE to nYn; see Fig. 6; VCC = 4.5 V; CL = 50 pF; 25 °C 7
Propagation delay nE to nYn tpd 51 ns nE to nYn; see Fig. 6; VCC = 4.5 V; CL = 50 pF; -40 °C to +125 °C 7
Transition time tt 7 15 ns nYn; see Fig. 5 and Fig. 6; VCC = 4.5 V; CL = 50 pF; 25 °C 7
Transition time tt 22 ns nYn; see Fig. 5 and Fig. 6; VCC = 4.5 V; CL = 50 pF; -40 °C to +125 °C 7

CAD (KiCad official)

  • Symbol: 74HCT139D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: 74hct139d-etched.step / 74hct139d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct139d.step / 74hct139d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 388b7843cfdd5442, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF