component
74HCT125PW
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 6d ago |
| viewers | 6d ago |
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| 74hct125pw-etched.step | 6d ago |
| 74hct125pw-hero.glb | 6d ago |
| 74hct125pw-hero.overlay.json | 6d ago |
| 74hct125pw.glb | 6d ago |
| 74hct125pw.kicad_mod | 6d ago |
| 74hct125pw.kicad_sym | 6d ago |
| 74hct125pw.lbr | 6d ago |
| 74hct125pw.step | 6d ago |
| package.json | 6d ago |
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| README.md | 6d ago |
74HCT125PW
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
74HCT125PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for buffer 1, active LOW; a HIGH level causes output 1Y to assume the high-impedance OFF-state. |
| 2 | 1A | input | Data input of buffer 1; the inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC. |
| 3 | 1Y | output | Data output of buffer 1, which goes to the high-impedance OFF-state when 1OE is HIGH. |
| 4 | 2OE | input | Output enable input for buffer 2, active LOW; a HIGH level causes output 2Y to assume the high-impedance OFF-state. |
| 5 | 2A | input | Data input of buffer 2; the inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC. |
| 6 | 2Y | output | Data output of buffer 2, which goes to the high-impedance OFF-state when 2OE is HIGH. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages. |
| 8 | 3Y | output | Data output of buffer 3, which goes to the high-impedance OFF-state when 3OE is HIGH. |
| 9 | 3A | input | Data input of buffer 3; the inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC. |
| 10 | 3OE | input | Output enable input for buffer 3, active LOW; a HIGH level causes output 3Y to assume the high-impedance OFF-state. |
| 11 | 4Y | output | Data output of buffer 4, which goes to the high-impedance OFF-state when 4OE is HIGH. |
| 12 | 4A | input | Data input of buffer 4; the inputs include clamp diodes, so current-limiting resistors can interface them to voltages above VCC. |
| 13 | 4OE | input | Output enable input for buffer 4, active LOW; a HIGH level causes output 4Y to assume the high-impedance OFF-state. |
| 14 | VCC | power_in | Supply voltage; 4.5 V to 5.5 V recommended for 74HCT125 (2.0 V to 6.0 V for 74HC125). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| Input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 | |
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 | |
| Output current | IO | -35 | 35 | mA | VO = -0.5 V to (VCC + 0.5 V) | 3 | |
| Supply current | ICC | 70 | mA | 3 | |||
| Ground current | IGND | -70 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Total power dissipation | Ptot | 500 | mW | [2] SOT402-1 (TSSOP14): derates linearly 7.3 mW/K above 81 °C | 3 | ||
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 74HCT125 | 3 |
| Input voltage | VI | 0 | V | 74HCT125; max printed as VCC | 3 | ||
| Output voltage | VO | 0 | V | 74HCT125; max printed as VCC | 3 | ||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 74HCT125 | 3 |
| Input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC = 4.5 V | 3 | |
| HIGH-level input voltage | VIH | 2 | 1.6 | V | VCC = 4.5 V to 5.5 V; min/max at -40 °C to +125 °C, typ at 25 °C | 5 | |
| LOW-level input voltage | VIL | 1.2 | 0.8 | V | VCC = 4.5 V to 5.5 V; min/max at -40 °C to +125 °C, typ at 25 °C | 5 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; min at -40 °C to +125 °C, typ at 25 °C | 5 | |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -6 mA; min at -40 °C to +125 °C, typ at 25 °C | 5 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; max at -40 °C to +125 °C, typ at 25 °C | 5 | |
| LOW-level output voltage | VOL | 0.16 | 0.4 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 6.0 mA; max at -40 °C to +125 °C, typ at 25 °C | 5 | |
| Input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 5.5 V; at -40 °C to +125 °C | 5 | |
| OFF-state output current | IOZ | -10 | 10 | μA | VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND; at -40 °C to +125 °C | 5 | |
| Supply current | ICC | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; at -40 °C to +125 °C | 5 | ||
| Additional supply current | ΔICC | 100 | 490 | μA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; max at -40 °C to +125 °C, typ at 25 °C | 5 | |
| Input capacitance | CI | 3.5 | pF | 5 | |||
| Propagation delay | tpd | 15 | 38 | ns | nA to nY; see Fig. 4; VCC = 4.5 V; max at -40 °C to +125 °C, typ at 25 °C | 6 | |
| Propagation delay | tpd | 12 | ns | nA to nY; VCC = 5 V; CL = 15 pF | 6 | ||
| Enable time | ten | 15 | 42 | ns | nOE to nY; see Fig. 5; VCC = 4.5 V; max at -40 °C to +125 °C, typ at 25 °C | 6 | |
| Disable time | tdis | 15 | 38 | ns | nOE to nY; see Fig. 5; VCC = 4.5 V; max at -40 °C to +125 °C, typ at 25 °C | 6 | |
| Transition time | tt | 5 | 18 | ns | nY; see Fig. 4; max at -40 °C to +125 °C, typ at 25 °C | 6 | |
| Power dissipation capacitance | CPD | 24 | pF | CL = 50 pF; f = 1 MHz; VI = GND to VCC - 1.5 V | 6 |
CAD (KiCad official)
- Symbol:
74HCT125PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hct125pw-etched.step/74hct125pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hct125pw.step/74hct125pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (13 pp, sha256
3b5da3a3dcae2624, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).