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Contents

README

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74HCT08D

Nexperia · Logic Gates · SOIC-14

74HCT08D from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input First 2-input AND gate input A
2 1B input First 2-input AND gate input B
3 1Y output First 2-input AND gate output
4 2A input Second 2-input AND gate input A
5 2B input Second 2-input AND gate input B
6 2Y output Second 2-input AND gate output
7 GND power_in Ground (0 V)
8 3Y output Third 2-input AND gate output
9 3A input Third 2-input AND gate input A
10 3B input Third 2-input AND gate input B
11 4Y output Fourth 2-input AND gate output
12 4A input Fourth 2-input AND gate input A
13 4B input Fourth 2-input AND gate input B
14 VCC power_in Supply voltage

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: 74HCT08D
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: 74hct08d-etched.step / 74hct08d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct08d.step / 74hct08d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 2e7d5aa7437a64e6, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF