component
74HCT04PW-Q100
Public Made by Adomby adom
Nexperia Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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74HCT04PW-Q100
Nexperia · Inverters · TSSOP-14
74HCT04PW-Q100 from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of inverter 1; the input clamp diodes allow current-limited interfacing to voltages above VCC, and the 74HCT04 input levels are TTL. |
| 2 | 1Y | output | Data output of inverter 1, the logic inverse of 1A (L input gives H output, H input gives L output). |
| 3 | 2A | input | Data input of inverter 2; the input clamp diodes allow current-limited interfacing to voltages above VCC. |
| 4 | 2Y | output | Data output of inverter 2, the logic inverse of 2A. |
| 5 | 3A | input | Data input of inverter 3; the input clamp diodes allow current-limited interfacing to voltages above VCC. |
| 6 | 3Y | output | Data output of inverter 3, the logic inverse of 3A. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 4Y | output | Data output of inverter 4, the logic inverse of 4A. |
| 9 | 4A | input | Data input of inverter 4; the input clamp diodes allow current-limited interfacing to voltages above VCC. |
| 10 | 5Y | output | Data output of inverter 5, the logic inverse of 5A. |
| 11 | 5A | input | Data input of inverter 5; the input clamp diodes allow current-limited interfacing to voltages above VCC. |
| 12 | 6Y | output | Data output of inverter 6, the logic inverse of 6A. |
| 13 | 6A | input | Data input of inverter 6; the input clamp diodes allow current-limited interfacing to voltages above VCC. |
| 14 | VCC | power_in | Supply voltage; recommended 4.5 V to 5.5 V for 74HCT04-Q100 (absolute maximum -0.5 V to +7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| output current | IO | -25 | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 4 | |
| supply current | ICC | 50 | mA | 4 | |||
| ground current | IGND | -50 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 500 | mW | SOT402-1 (TSSOP14); derates linearly with 7.3 mW/K above 81 °C | 4 | ||
| supply voltage | VCC | 4.5 | 5 | 5.5 | V | 74HCT04-Q100 | 4 |
| input voltage | VI | 0 | V | 74HCT04-Q100; maximum printed as VCC | 4 | ||
| output voltage | VO | 0 | V | 74HCT04-Q100; maximum printed as VCC | 4 | ||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 74HCT04-Q100 | 4 |
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC = 4.5 V; 74HCT04-Q100 | 4 | |
| HIGH-level input voltage | VIH | 2 | 1.6 | V | VCC = 4.5 V to 5.5 V; Tamb 25 °C | 6 | |
| HIGH-level input voltage | VIH | 2 | V | VCC = 4.5 V to 5.5 V; Tamb -40 °C to +85 °C | 6 | ||
| LOW-level input voltage | VIL | 1.2 | 0.8 | V | VCC = 4.5 V to 5.5 V; Tamb 25 °C | 6 | |
| LOW-level input voltage | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V; Tamb -40 °C to +85 °C | 6 | ||
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; Tamb 25 °C | 6 | |
| HIGH-level output voltage | VOH | 4.4 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; Tamb -40 °C to +85 °C | 6 | ||
| HIGH-level output voltage | VOH | 3.84 | 4.32 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; Tamb 25 °C | 6 | |
| HIGH-level output voltage | VOH | 3.84 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; Tamb -40 °C to +85 °C | 6 | ||
| HIGH-level output voltage | VOH | 3.7 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; Tamb -40 °C to +125 °C | 6 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; Tamb 25 °C | 6 | |
| LOW-level output voltage | VOL | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; Tamb -40 °C to +85 °C | 6 | ||
| LOW-level output voltage | VOL | 0.15 | 0.26 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; Tamb 25 °C | 6 | |
| LOW-level output voltage | VOL | 0.33 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; Tamb -40 °C to +85 °C | 6 | ||
| LOW-level output voltage | VOL | 0.4 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; Tamb -40 °C to +125 °C | 6 | ||
| input leakage current | II | -0.1 | 0.1 | μA | VI = VCC or GND; VCC = 5.5 V; Tamb 25 °C | 6 | |
| input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 5.5 V; Tamb -40 °C to +85 °C | 6 | |
| supply current | ICC | 2 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb 25 °C | 6 | ||
| supply current | ICC | 20 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb -40 °C to +85 °C | 6 | ||
| supply current | ICC | 40 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb -40 °C to +125 °C | 6 | ||
| additional supply current | ΔICC | 120 | 432 | μA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; Tamb 25 °C | 6 | |
| additional supply current | ΔICC | 540 | μA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; Tamb -40 °C to +85 °C | 6 | ||
| additional supply current | ΔICC | 590 | μA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; Tamb -40 °C to +125 °C | 6 | ||
| propagation delay | tpd | 10 | 19 | ns | GND = 0 V; CL = 50 pF; nA to nY; see Fig. 4; VCC = 4.5 V; Tamb 25 °C | 7 | |
| propagation delay | tpd | 24 | ns | GND = 0 V; CL = 50 pF; nA to nY; see Fig. 4; VCC = 4.5 V; Tamb -40 °C to +85 °C | 7 | ||
| propagation delay | tpd | 29 | ns | GND = 0 V; CL = 50 pF; nA to nY; see Fig. 4; VCC = 4.5 V; Tamb -40 °C to +125 °C | 7 | ||
| transition time | tt | 7 | 15 | ns | GND = 0 V; CL = 50 pF; see Fig. 4; VCC = 4.5 V; Tamb 25 °C | 7 | |
| transition time | tt | 19 | ns | GND = 0 V; CL = 50 pF; see Fig. 4; VCC = 4.5 V; Tamb -40 °C to +85 °C | 7 | ||
| transition time | tt | 22 | ns | GND = 0 V; CL = 50 pF; see Fig. 4; VCC = 4.5 V; Tamb -40 °C to +125 °C | 7 |
CAD (KiCad official)
- Symbol:
74HCT04PW-Q100 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hct04pw-q100-etched.step/74hct04pw-q100-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hct04pw-q100.step/74hct04pw-q100.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
5044a04bb89c145e, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).