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docs 74hc74pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers 74hc74pw: viewers · Ray 1mo ago
74hc74pw-etched.fit.json 74hc74pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74hc74pw-etched.glb 74hc74pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74hc74pw-etched.step 74hc74pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74hc74pw.glb Publish 0.1.0 · Ray 1mo ago
74hc74pw.kicad_mod Publish 0.1.0 · Ray 1mo ago
74hc74pw.kicad_sym Publish 0.1.0 · Ray 1mo ago
74hc74pw.lbr Publish 0.1.0 · Ray 1mo ago
74hc74pw.step Publish 0.1.0 · Ray 1mo ago
package.json 74hc74pw: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
page.json 74hc74pw: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md 74hc74pw: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74HC74PW

Nexperia · Flip Flops · TSSOP-14

74HC74PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1RD input Asynchronous reset-direct input (active LOW) for flip-flop 1
2 1D input Data input for flip-flop 1
3 1CP input Clock input (LOW-to-HIGH, edge-triggered) for flip-flop 1
4 1SD input Asynchronous set-direct input (active LOW) for flip-flop 1
5 1Q output Q output from flip-flop 1
6 1Q output Complement output from flip-flop 1
7 GND power_in Ground (0 V)
8 2Q output Complement output from flip-flop 2
9 2Q output Q output from flip-flop 2
10 2SD input Asynchronous set-direct input (active LOW) for flip-flop 2
11 2CP input Clock input (LOW-to-HIGH, edge-triggered) for flip-flop 2
12 2D input Data input for flip-flop 2
13 2RD input Asynchronous reset-direct input (active LOW) for flip-flop 2
14 VCC power_in Supply voltage

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: 74HC74PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74hc74pw-etched.step / 74hc74pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc74pw.step / 74hc74pw.glb are the bare package body.
  • Laser-etched variant: 74hc74pw-etched.step / 74hc74pw-etched.glb, the same package body with the MPN marked on the die, in a toggleable Adom.LaserEtch group (Fusion-ready).

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (19 pp, sha256 1e4ab9833ba6e6a3, retrieved 2026-09-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF