component
74HC7014D-Q100J
Public Made by Adomby adom
Nexperia Buffers / Drivers, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74HC7014D-Q100J
Nexperia · Buffers / Drivers · SOP-14
74HC7014D-Q100J from Nexperia, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of gate 1, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 2 | 1Y | output | Data output of gate 1. |
| 3 | 2A | input | Data input of gate 2, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 4 | 2Y | output | Data output of gate 2. |
| 5 | 3A | input | Data input of gate 3, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 6 | 3Y | output | Data output of gate 3. |
| 7 | GND | power_in | Ground (0 V). |
| 8 | 4Y | output | Data output of gate 4. |
| 9 | 4A | input | Data input of gate 4, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 10 | 5Y | output | Data output of gate 5. |
| 11 | 5A | input | Data input of gate 5, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 12 | 6Y | output | Data output of gate 6. |
| 13 | 6A | input | Data input of gate 6, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 14 | VCC | power_in | Supply voltage, 2.0 V to 6.0 V recommended (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| Input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 | |
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 | |
| Output current | IO | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 3 | ||
| Supply current | ICC | 50 | mA | 3 | |||
| Ground current | IGND | -50 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Total power dissipation | Ptot | 500 | mW | SO14 package | 3 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 3 | |
| Input voltage | VI | 0 | V | max is VCC | 3 | ||
| Output voltage | VO | 0 | V | max is VCC | 3 | ||
| Ambient temperature | Tamb | -40 | 125 | °C | 3 | ||
| HIGH-level output voltage | VOH | 1.9 | V | VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V; -40 °C to +125 °C | 4 | ||
| HIGH-level output voltage | VOH | 4.4 | V | VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C | 4 | ||
| HIGH-level output voltage | VOH | 5.9 | V | VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V; -40 °C to +125 °C | 4 | ||
| HIGH-level output voltage | VOH | 3.7 | V | VI = VT+ or VT-; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 4 | ||
| HIGH-level output voltage | VOH | 5.2 | V | VI = VT+ or VT-; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C | 4 | ||
| LOW-level output voltage | VOL | 0.1 | V | VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V; -40 °C to +125 °C | 4 | ||
| LOW-level output voltage | VOL | 0.4 | V | VI = VT+ or VT-; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 4 | ||
| Input leakage current | II | 1 | μA | VCC = 6.00 V; VI = VCC or GND; -40 °C to +125 °C | 4 | ||
| Input leakage current | II | 5 | μA | VCC = 3.00 V to 6.00 V; VI = 16 V or GND; -40 °C to +125 °C | 4 | ||
| DC supply current | ICC | 2.1 | mA | VCC = 3.00 V; -40 °C to +125 °C | 4 | ||
| DC supply current | ICC | 7.5 | mA | VCC = 5.25 V; -40 °C to +125 °C | 4 | ||
| DC supply current | ICC | 13 | mA | VCC = 6.00 V; -40 °C to +125 °C | 4 | ||
| HIGH to LOW propagation delay | tPHL | 715 | ns | nA to nY; VCC = 3.00 V; -40 °C to +125 °C | 5 | ||
| HIGH to LOW propagation delay | tPHL | 175 | ns | nA to nY; VCC = 4.75 V; -40 °C to +125 °C | 5 | ||
| HIGH to LOW propagation delay | tPHL | 112 | ns | nA to nY; VCC = 6.00 V; -40 °C to +125 °C | 5 | ||
| LOW to HIGH propagation delay | tPLH | 260 | ns | nA to nY; VCC = 3.00 V; -40 °C to +125 °C | 5 | ||
| LOW to HIGH propagation delay | tPLH | 78 | ns | nA to nY; VCC = 4.75 V; -40 °C to +125 °C | 5 | ||
| LOW to HIGH propagation delay | tPLH | 70 | ns | nA to nY; VCC = 6.00 V; -40 °C to +125 °C | 5 | ||
| Transition time | tt | 30 | ns | VCC = 3.00 V; -40 °C to +125 °C | 5 | ||
| Transition time | tt | 22 | ns | VCC = 4.75 V; -40 °C to +125 °C | 5 | ||
| Transition time | tt | 19 | ns | VCC = 6.00 V; -40 °C to +125 °C | 5 | ||
| Positive-going threshold voltage | VT+ | 1.95 | V | VCC = 3.00 V; -40 °C to +125 °C | 7 | ||
| Positive-going threshold voltage | VT+ | 3.08 | V | VCC = 4.75 V; -40 °C to +125 °C | 7 | ||
| Positive-going threshold voltage | VT+ | 3.25 | V | VCC = 5.00 V; -40 °C to +125 °C | 7 | ||
| Positive-going threshold voltage | VT+ | 3.41 | V | VCC = 5.25 V; -40 °C to +125 °C | 7 | ||
| Positive-going threshold voltage | VT+ | 3.9 | V | VCC = 6.00 V; -40 °C to +125 °C | 7 | ||
| Negative-going threshold voltage | VT- | 1.65 | V | VCC = 3.00 V; -40 °C to +125 °C | 7 | ||
| Negative-going threshold voltage | VT- | 2.62 | V | VCC = 4.75 V; -40 °C to +125 °C | 7 | ||
| Negative-going threshold voltage | VT- | 2.75 | V | VCC = 5.00 V; -40 °C to +125 °C | 7 | ||
| Negative-going threshold voltage | VT- | 2.89 | V | VCC = 5.25 V; -40 °C to +125 °C | 7 | ||
| Negative-going threshold voltage | VT- | 3.3 | V | VCC = 6.00 V; -40 °C to +125 °C | 7 | ||
| Hysteresis voltage | VH | 50 | mV | VCC = 3.00 V; -40 °C to +125 °C | 7 | ||
| Hysteresis voltage | VH | 100 | mV | VCC = 4.75 V; -40 °C to +125 °C | 7 | ||
| Hysteresis voltage | VH | 120 | mV | VCC = 5.00 V; -40 °C to +125 °C | 7 | ||
| Hysteresis voltage | VH | 130 | mV | VCC = 5.25 V; -40 °C to +125 °C | 7 | ||
| Hysteresis voltage | VH | 160 | mV | VCC = 6.00 V; -40 °C to +125 °C | 7 | ||
| Ptot derating above 100 °C | Ptot | 10.1 | mW/K | SOT108-1 (SO14) package; derates linearly above 100 °C | 3 | ||
| Input capacitance | CI | 3.5 | pF | Tamb = 25 °C | 4 | ||
| Power dissipation capacitance | CPD | 9 | pF | per gate; VI = GND to VCC; Tamb = 25 °C | 5 |
CAD (KiCad official)
- Symbol:
74HC7014D-Q100J - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc7014d-q100j-etched.step/74hc7014d-q100j-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc7014d-q100j.step/74hc7014d-q100j.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (11 pp, sha256
146df4b67f1cf89c, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC7014D-Q100J
**Nexperia** · Buffers / Drivers · SOP-14
74HC7014D-Q100J from Nexperia, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of gate 1, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 2 | 1Y | output | Data output of gate 1. |
| 3 | 2A | input | Data input of gate 2, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 4 | 2Y | output | Data output of gate 2. |
| 5 | 3A | input | Data input of gate 3, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 6 | 3Y | output | Data output of gate 3. |
| 7 | GND | power_in | Ground (0 V). |
| 8 | 4Y | output | Data output of gate 4. |
| 9 | 4A | input | Data input of gate 4, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 10 | 5Y | output | Data output of gate 5. |
| 11 | 5A | input | Data input of gate 5, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 12 | 6Y | output | Data output of gate 6. |
| 13 | 6A | input | Data input of gate 6, a precision Schmitt-trigger input that tolerates shorts from -1.5 V to +16 V. |
| 14 | VCC | power_in | Supply voltage, 2.0 V to 6.0 V recommended (absolute maximum 7 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOP-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 7 | V | | 3 |
| Input clamping current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 |
| Output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 |
| Output current | IO | | | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 3 |
| Supply current | ICC | | | 50 | mA | | 3 |
| Ground current | IGND | -50 | | | mA | | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| Total power dissipation | Ptot | | | 500 | mW | SO14 package | 3 |
| Supply voltage | VCC | 2 | 5 | 6 | V | | 3 |
| Input voltage | VI | 0 | | | V | max is VCC | 3 |
| Output voltage | VO | 0 | | | V | max is VCC | 3 |
| Ambient temperature | Tamb | -40 | | 125 | °C | | 3 |
| HIGH-level output voltage | VOH | 1.9 | | | V | VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V; -40 °C to +125 °C | 4 |
| HIGH-level output voltage | VOH | 4.4 | | | V | VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C | 4 |
| HIGH-level output voltage | VOH | 5.9 | | | V | VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V; -40 °C to +125 °C | 4 |
| HIGH-level output voltage | VOH | 3.7 | | | V | VI = VT+ or VT-; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 4 |
| HIGH-level output voltage | VOH | 5.2 | | | V | VI = VT+ or VT-; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C | 4 |
| LOW-level output voltage | VOL | | | 0.1 | V | VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V; -40 °C to +125 °C | 4 |
| LOW-level output voltage | VOL | | | 0.4 | V | VI = VT+ or VT-; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 4 |
| Input leakage current | II | | | 1 | μA | VCC = 6.00 V; VI = VCC or GND; -40 °C to +125 °C | 4 |
| Input leakage current | II | | | 5 | μA | VCC = 3.00 V to 6.00 V; VI = 16 V or GND; -40 °C to +125 °C | 4 |
| DC supply current | ICC | | | 2.1 | mA | VCC = 3.00 V; -40 °C to +125 °C | 4 |
| DC supply current | ICC | | | 7.5 | mA | VCC = 5.25 V; -40 °C to +125 °C | 4 |
| DC supply current | ICC | | | 13 | mA | VCC = 6.00 V; -40 °C to +125 °C | 4 |
| HIGH to LOW propagation delay | tPHL | | | 715 | ns | nA to nY; VCC = 3.00 V; -40 °C to +125 °C | 5 |
| HIGH to LOW propagation delay | tPHL | | | 175 | ns | nA to nY; VCC = 4.75 V; -40 °C to +125 °C | 5 |
| HIGH to LOW propagation delay | tPHL | | | 112 | ns | nA to nY; VCC = 6.00 V; -40 °C to +125 °C | 5 |
| LOW to HIGH propagation delay | tPLH | | | 260 | ns | nA to nY; VCC = 3.00 V; -40 °C to +125 °C | 5 |
| LOW to HIGH propagation delay | tPLH | | | 78 | ns | nA to nY; VCC = 4.75 V; -40 °C to +125 °C | 5 |
| LOW to HIGH propagation delay | tPLH | | | 70 | ns | nA to nY; VCC = 6.00 V; -40 °C to +125 °C | 5 |
| Transition time | tt | | | 30 | ns | VCC = 3.00 V; -40 °C to +125 °C | 5 |
| Transition time | tt | | | 22 | ns | VCC = 4.75 V; -40 °C to +125 °C | 5 |
| Transition time | tt | | | 19 | ns | VCC = 6.00 V; -40 °C to +125 °C | 5 |
| Positive-going threshold voltage | VT+ | | | 1.95 | V | VCC = 3.00 V; -40 °C to +125 °C | 7 |
| Positive-going threshold voltage | VT+ | | | 3.08 | V | VCC = 4.75 V; -40 °C to +125 °C | 7 |
| Positive-going threshold voltage | VT+ | | | 3.25 | V | VCC = 5.00 V; -40 °C to +125 °C | 7 |
| Positive-going threshold voltage | VT+ | | | 3.41 | V | VCC = 5.25 V; -40 °C to +125 °C | 7 |
| Positive-going threshold voltage | VT+ | | | 3.9 | V | VCC = 6.00 V; -40 °C to +125 °C | 7 |
| Negative-going threshold voltage | VT- | 1.65 | | | V | VCC = 3.00 V; -40 °C to +125 °C | 7 |
| Negative-going threshold voltage | VT- | 2.62 | | | V | VCC = 4.75 V; -40 °C to +125 °C | 7 |
| Negative-going threshold voltage | VT- | 2.75 | | | V | VCC = 5.00 V; -40 °C to +125 °C | 7 |
| Negative-going threshold voltage | VT- | 2.89 | | | V | VCC = 5.25 V; -40 °C to +125 °C | 7 |
| Negative-going threshold voltage | VT- | 3.3 | | | V | VCC = 6.00 V; -40 °C to +125 °C | 7 |
| Hysteresis voltage | VH | 50 | | | mV | VCC = 3.00 V; -40 °C to +125 °C | 7 |
| Hysteresis voltage | VH | 100 | | | mV | VCC = 4.75 V; -40 °C to +125 °C | 7 |
| Hysteresis voltage | VH | 120 | | | mV | VCC = 5.00 V; -40 °C to +125 °C | 7 |
| Hysteresis voltage | VH | 130 | | | mV | VCC = 5.25 V; -40 °C to +125 °C | 7 |
| Hysteresis voltage | VH | 160 | | | mV | VCC = 6.00 V; -40 °C to +125 °C | 7 |
| Ptot derating above 100 °C | Ptot | | 10.1 | | mW/K | SOT108-1 (SO14) package; derates linearly above 100 °C | 3 |
| Input capacitance | CI | | 3.5 | | pF | Tamb = 25 °C | 4 |
| Power dissipation capacitance | CPD | | 9 | | pF | per gate; VI = GND to VCC; Tamb = 25 °C | 5 |
## CAD (KiCad official)
- Symbol: `74HC7014D-Q100J`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `74hc7014d-q100j-etched.step` / `74hc7014d-q100j-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc7014d-q100j.step` / `74hc7014d-q100j.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74HC7014D-Q100J.pdf) (11 pp, sha256 `146df4b67f1cf89c`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc7014d-q100j-datasheet.pdf)