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74HC595S16-13
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Diodes Incorporated Registers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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Datasheet
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README
markdown74HC595S16-13
Diodes Incorporated · Registers · SOIC-16
74HC595S16-13 from Diodes Incorporated, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Q1 | tri_state | Parallel 3-state data output 1, active only while the output enable is asserted low. |
| 2 | Q2 | tri_state | Parallel 3-state data output 2, active only while the output enable is asserted low. |
| 3 | Q3 | tri_state | Parallel 3-state data output 3, active only while the output enable is asserted low. |
| 4 | Q4 | tri_state | Parallel 3-state data output 4, active only while the output enable is asserted low. |
| 5 | Q5 | tri_state | Parallel 3-state data output 5, active only while the output enable is asserted low. |
| 6 | Q6 | tri_state | Parallel 3-state data output 6, active only while the output enable is asserted low. |
| 7 | Q7 | tri_state | Parallel 3-state data output 7, a standard output rated at ±25 mA continuous current. |
| 8 | GND | power_in | Ground reference pin for the device. |
| 9 | Q7S | output | Serial data output that carries the shift register's last stage, rated for IOH of -4.0 mA at 4.5 V. |
| 10 | MR | input | Active-low master reset that clears the shift register to zero and is independent of all clocks. |
| 11 | SHCP | input | Shift register clock input; data on DS is shifted in on each positive transition of this clock. |
| 12 | STCP | input | Storage register clock input; a rising pulse transfers the shift register contents to the output register. |
| 13 | OE | input | Output enable input; the 3-state outputs Q0-Q7 become active when this input is asserted low. |
| 14 | DS | input | Serial data input that is shifted into the first stage of the 8-bit shift register on each SHCP rising edge. |
| 15 | Q0 | tri_state | Parallel 3-state data output 0, active only while the output enable is asserted low. |
| 16 | VCC | power_in | Supply voltage pin; the recommended operating range is 2.0 V to 6.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOIC-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 2 | 6 | V | 4 | ||
| Input Transition Rise or Fall Rate | Δt/ΔV | 1000 | ns/V | VCC = 2.0V | 4 | ||
| Input Transition Rise or Fall Rate | Δt/ΔV | 500 | ns/V | VCC = 4.5V | 4 | ||
| Input Transition Rise or Fall Rate | Δt/ΔV | 400 | ns/V | VCC = 6.0V | 4 | ||
| Operating Free-Air Temperature | TA | -40 | 125 | °C | 4 | ||
| Input Voltage Range | VI | 0 | V | Upper limit VCC | 4 | ||
| Output Voltage Active Mode | VO | 0 | V | Upper limit VCC | 4 | ||
| Supply Voltage Range | VCC | -0.5 | 7 | V | 4 | ||
| Input Voltage Range | VI | -0.5 | 7 | V | 4 | ||
| Voltage Applied to Output in High or Low State | Vo | -0.3 | V | Upper limit VCC +0.5V | 4 | ||
| Input Clamp Current | IIK | -20 | mA | VI < -0.5V | 4 | ||
| Input Clamp Current | IIK | 20 | mA | VI > VCC +0.5V | 4 | ||
| Output Clamp Current | IOK | -20 | mA | VO < -0.5V | 4 | ||
| Output Clamp Current | IOK | 20 | mA | VO > VCC +0.5V | 4 | ||
| Continuous Output Current | IO | -25 | 25 | mA | Q7 Standard Output | 4 | |
| Continuous Output Current | IO | -35 | 35 | mA | Qn Bus Driver Outputs | 4 | |
| Continuous Current through Vdd or GND | ICC | 70 | mA | 4 | |||
| Continuous Current through Vdd or GND | IGND | -70 | mA | 4 | |||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 4 | ||
| Total Power Dissipation | PTOT | 500 | mW | 4 | |||
| High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0V, TA = -40°C to +125°C | 5 | ||
| High-Level Input Voltage | VIH | 3.15 | V | VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| High-Level Input Voltage | VIH | 4.2 | V | VCC = 6.0V, TA = -40°C to +125°C | 5 | ||
| Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0V, TA = -40°C to +125°C | 5 | ||
| Low-Level Input Voltage | VIL | 1.35 | V | VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| Low-Level Input Voltage | VIL | 1.8 | V | VCC = 6.0V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (All Outputs) | VOH | 1.9 | V | IOH = -20μA, VCC = 2.0V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (All Outputs) | VOH | 4.4 | V | IOH = -20μA, VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (All Outputs) | VOH | 5.9 | V | IOH = -20μA, VCC = 6.0V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (Q7S Output) | VOH | 3.7 | V | IOH = -4.0mA, VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (Q7S Output) | VOH | 5.2 | V | IOH = -5.2mA, VCC = 6.0V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (Qn Bus Outputs) | VOH | 3.7 | V | IOH = -6.0mA, VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| High-Level Output Voltage (Qn Bus Outputs) | VOH | 5.2 | V | IOH = -7.8mA, VCC = 6.0V, TA = -40°C to +125°C | 5 | ||
| Low-Level Output Voltage (All Outputs) | VOL | 0.1 | V | IOL = 20μA, VCC = 2.0V, TA = -40°C to +125°C | 5 | ||
| Low-Level Output Voltage (Q7S Output) | VOL | 0.4 | V | IOL = 4.0mA, VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| Low-Level Output Voltage (Qn Bus Outputs) | VOL | 0.4 | V | IOL = 6.0mA, VCC = 4.5V, TA = -40°C to +125°C | 5 | ||
| Input Current | II | -1 | 1 | μA | VI = GND to 5.5V, VCC = 6.0V, TA = -40°C to +125°C | 5 | |
| OFF-State Output Current | IOZ | -10 | 10 | μA | Qn internal high or low, Vo = VCC or GND, VCC = 6.0V, TA = -40°C to +125°C | 5 | |
| Supply Current | ICC | 160 | μA | VI = GND or VCC, IO = 0, VCC = 6.0V, TA = -40°C to +125°C | 5 | ||
| Input Capacitance | Ci | 4 | 10 | pF | VI = VCC or GND, VCC = 6.0V | 5 | |
| Maximum Frequency (SHCP or STCP) | fMAX | 4 | MHz | VCC = 2.0V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Maximum Frequency (SHCP or STCP) | fMAX | 20 | MHz | VCC = 4.5V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Maximum Frequency (SHCP or STCP) | fMAX | 24 | MHz | VCC = 6.0V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Set-up Time DS to SHCP | tSU | 75 | ns | VCC = 2.0V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Set-up Time DS to SHCP | tSU | 15 | ns | VCC = 4.5V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Set-up Time DS to SHCP | tSU | 13 | ns | VCC = 6.0V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Propagation Delay STCP to Qn | tPD | 265 | ns | VCC = 2.0V, CL = 50pF, Figure 1, TA = -40°C to +125°C | 6 | ||
| Propagation Delay STCP to Qn | tPD | 53 | ns | VCC = 4.5V, CL = 50pF, Figure 1, TA = -40°C to +125°C | 6 | ||
| Propagation Delay STCP to Qn | tPD | 45 | ns | VCC = 6.0V, CL = 50pF, Figure 1, TA = -40°C to +125°C | 6 | ||
| Enable Time E to Qn | tEN | 225 | ns | VCC = 2.0V, CL = 50pF, Figure 1, TA = -40°C to +125°C | 6 | ||
| Enable Time E to Qn | tEN | 45 | ns | VCC = 4.5V, CL = 50pF, Figure 1, TA = -40°C to +125°C | 6 | ||
| Enable Time E to Qn | tEN | 38 | ns | VCC = 6.0V, CL = 50pF, Figure 1, TA = -40°C to +125°C | 6 | ||
| Pulse Width SHCP HIGH or LOW | tW | 110 | ns | VCC = 2.0V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Pulse Width SHCP HIGH or LOW | tW | 22 | ns | VCC = 4.5V, Figure 1, TA = -40°C to +125°C | 6 | ||
| Pulse Width SHCP HIGH or LOW | tW | 19 | ns | VCC = 6.0V, Figure 1, TA = -40°C to +125°C | 6 |
CAD (KiCad official)
- Symbol:
74HC595S16-13 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
74hc595s16-13-etched.step/74hc595s16-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc595s16-13.step/74hc595s16-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (11 pp, sha256
84a25d0009f7160c, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).